A testing device and a method for testing a device under test are provided. The testing device comprises at least two signal generators, at least two numerically controlled oscillators, at least two white gaussian noise generators, at least two digital filters, each of which comprising a respective transfer function H.sub.i, at least two adders, at least two digital-to-analog converters, and an analog processor.

This application is related to a measuring system and method for performing various measurement tasks. The measuring system comprises a test-setup configured to measure the characteristics of a device-under-test and an input-device of the test-setup configured to receive a test-case. The measuring system further comprises several measurement-hardware devices configured to perform the measurements according to the test-case. A computer unit of the measuring system is configured to determine at least one required hardware device on the basis of the test-case and to select the additional measurement-hardware devices. The computer unit is further configured to identify an adding of the selected additional measurement-hardware.

A new test system includes a programmed device having an input port for receiving a signal for testing or measuring on the programmed device, and a reprogrammable test accessory having an output coupled to the input port of the programmed device. The reprogrammable test accessory further includes a test port structured to accept one or more test signals from a Device Under Test (DUT), and a reprogrammable processor. The reprogrammable processor may further include reprogrammable standards and protocols, reprogrammable triggers and margin detection, reprogrammable link training, reprogrammable handshaking, and reprogrammable setup and control facilities for either or both of the DUT and the programmed device.

A method includes receiving tester configuration data, test pattern data, and tester operation data; configuring a circuit for performing a designated test evaluation; generating a stimulus waveform; converting the stimulus waveform to an analog stimulus signal; transferring the analog stimulus signal to a first terminal of a MTJ DUT at reception of a trigger timing signal; generating time traces based on the trigger timing signal; generating a response signal at a second terminal of the MTJ DUT and across a termination resistor as the analog stimulus signal is transferred through the MTJ DUT; converting the response signal to a digitized response signal indicating its voltage amplitude; and performing the designated test evaluation and analysis function in the configurable circuit based on voltage amplitudes and time values of the stimulus waveform, the digitized response signal, and the timing traces.

A measurement device with automatic optimization capabilities comprises at least one signal processing component with a physical detector and a virtual detector component comprising at least one virtual detector for a signal processing component without physical detector. The physical detector is configured to physically measure a measurement value assigned to the signal processing component. The virtual detector component is configured to use a model of a signal processing chain from the physical detector to the location of the virtual detector. The model comprises at least one model parameter for the signal processing chain. The measurement device is configured to adapt the virtual detector component with respect to a measurement type for the signal to be measured. The virtual detector component is configured to use the model and the at least one measurement value. The virtual detector component is configured to determine a virtually determined value based on the model and the at least one measurement value. The measurement device is configured to use the virtually determined value to determine a setting for the measurement device. In addition, a method of setting a measurement device is described.

A test apparatus is configured to test a DUT that does not support synchronous control from an external circuit. A main controller is configured based on an architecture that tests a device by synchronous control with the main controller itself as the master. A MIU is configured as an interface between the main controller and the DUT. The MIU establishes asynchronous control between it and the DUT with the DUT as the master, and establishes control between it and the main controller with the main controller as the master.

A test and measurement instrument includes an input to receive a non-return-to-zero (NRZ) waveform signal from a device under test, a ramp generator to use the NRZ waveform signal to generate a ramp sweep signal, a gate to gate the ramp sweep signal and the NRZ waveform signal to produce gated X-axis and Y-axis data, and a display to display the gated X-axis and Y-axis data as a cyclic loop image. A method of generating a cyclic loop image includes receiving an input waveform, using the input waveform to generate a ramp sweep signal, gating the ramp sweep signal and the input waveform to produce gated X-axis and Y-axis data, and displaying the gated X-axis and Y-axis data as a cyclic loop image.

A system includes an input to receive a digital waveform signal, a memory, and one or more processors configured to execute code to cause the one or more processors to: generate a horizontal ramp sweep signal based on the digital waveform signal; receive a selection input to identify a segment of the digital waveform signal; gate the horizontal ramp sweep signal and the digital waveform signal based on the selection input to produce cyclic loop image data for the segment of the digital waveform; store the cyclic loop image data in the memory; and provide the cyclic loop image data as one or more inputs into a machine learning system. A method of waveform classification using a cyclic loop image includes receiving an input waveform, receiving a selection of a segment of the input waveform, transforming the segment of the input waveform into cyclic loop image data, the transforming comprising generating a horizontal ramp sweep signal based on edge transitions in the input waveform, and storing the cyclic loop image data in a memory; and sending the cyclic loop image data to a machine learning system to determine an attribute of the input waveform.

Systems and methods are disclosed for testing a device under test (DUT) by receiving a test pattern for a functional test, wherein the test pattern includes a test vector, an expected test result, and an expected power consumption; instructing the test system to run a repetitive loop using a selected functional test as the stimulus; at selected steps in the functional test, measuring power consumption of the DUT; and validating the DUT based on validating the test vector and the power consumption with one or more expected test result patterns and expected power consumption patterns.

Presented embodiments facilitate efficient and effective diagnostic of test system operations, including temperature control of test equipment components. In one embodiment a test equipment diagnostic method includes applying a known/expected first bit pattern to a test equipment component, applying a known/expected second bit pattern to a test equipment component, and performing a test equipment temperature control analysis based upon the results of applying the known/expected first bit pattern and known/expected second bit pattern. The first bit pattern and second bit pattern have known/expected respective thermal loads and corresponding respective first known/expected/expected temperature and second known/expected/expected temperature. In one embodiment, performing a test equipment temperature control analysis includes determining if temperature control components control a temperature of the test equipment component within acceptable tolerances. In one exemplary implementation, the test equipment component is a test control component (e.g., a field programmable gate array (FPGA), etc.).