An apparatus for testing a device under test (DUT) is provided. The apparatus includes a power supply device and a data generating device. The power supply device is configured to provide a first voltage and a second voltage to the DUT. The data generating device is configured to provide first data to the DUT. The power supply device is configured to provide the first voltage to the DUT in a first time duration. The data generating device is configured to provide the first data to the DUT in the first time duration. The power supply device is configured to provide the second voltage to the DUT in a second time duration after the first time duration. The second voltage is different from the first voltage.

A clamp circuit comprises an output transistor and a replica transistor coupled as a current minor pair, wherein the replica transistor is scaled in size to the output transistor by a size ratio; a first current source configured to set a current in the replica transistor, wherein the output current is set at a clamped output current value that is a sum of current of the first current source and a scaled value of the current of the first current source determined according to the size ratio; and a register circuit, wherein a register value stored in the register circuit sets the clamped output current value.

A pin driver control system for enhancing pulse fidelity can include a first current switch circuit with a current input node and a voltage input node, wherein the first current switch circuit provides a switched output current signal in response to a voltage control signal at the voltage input node. The system can further include a first current source configured to receive a bias control signal and, in response, provide a drive current signal to the current input node of the first current switch. The drive current signal can have a magnitude that exceeds a magnitude of the switched output current signal. The system can further include a bias control circuit configured to receive information about a desired bias current magnitude for use by the first current switch circuit and, in response, provide the bias control signal to the first current source.

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

An electronic device for testing of semiconductor components with test needles includes an electric power source, a plurality of test needles connected with the electric power source, a plurality of electric circuits, each one of the electric circuits connected upstream of one of the test needles, each one of the electric circuits including at least one circuit component which has low resistance in a range of electric currents and has high resistance above a given limit electric current, a control voltage source connected with each one of the electric circuits, and two DC/DC converter circuits connected between the control voltage source and the electric circuits.

A probe apparatus includes a tester including a voltage supply, and a probe card including a first probe and a first sensing pin. The first probe is electrically connected to both an output port of the voltage supply and an electrode pad of a first semiconductor device. The first sensing pin is electrically connected to both a controller and a sensing pad of the first semiconductor device.

A driving circuit includes an amplifier circuit, a control path, and a control circuit. The control path is coupled to the amplifier circuit. The control circuit is coupled to the control path. The control circuit receives a control signal and outputs a modulation signal to the control path according to the control signal.

An apparatus for measuring a device current of a device under test (DUT) includes a first circuit including a first terminal for coupling to a first connection terminal of the DUT. The first circuit is configured to supply a first test voltage for the first terminal and to output a first output voltage sensed at the first terminal. The apparatus further includes a second circuit having a second terminal for coupling to a second connection terminal of the DUT. The second circuit is configured to supply a second test voltage for the second terminal and to output a second output voltage sensed at the second terminal. The apparatus further includes a third circuit configured to determine the device current of the DUT based on the first output voltage, the second output voltage, the first test voltage and the second test voltage. The first circuit and the second circuit are identical.

A method, and forming an associated system, for testing semiconductor devices. Driver channels are provided, each driver channel connected to a storage device via a bus and connected to a respective semiconductor device. Each driver channel includes: a first voltage driver connected to the respective semiconductor device and having a first input for the respective semiconductor device, a second voltage driver connected to the respective semiconductor device and having a second input for the respective semiconductor device, first and second sets of optical switches in the first and second voltage driver respectively, and a microcontroller. All connections between the respective semiconductor device and both the first and second voltage drivers, in response to all optical switches of the first and second set of optical switches being closed. The semiconductor devices are tested, using the driver channels and the test parameters. The test results are provided to the storage device.

An example apparatus for interfacing between automatic test equipment (ATE) and a device under test (DUT) includes: multiple stages arranged in sequence between the ATE and the DUT, where each of the multiple stages includes a driver, at least two of the multiple stages each includes a filter, each filter is arranged between two drivers, and each filter is configured to reduce jitter produced by a preceding driver in a signal transmitted between the ATE and the DUT.