In an optical circuit, a substrate can define a cavity that extends into a substrate front surface. A sidewall of the cavity can include a substrate optical port. An optical path can extend through the substrate from a connector optical port to the substrate optical port. A photonic integrated circuit (PIC) can attach to the substrate. A PIC front surface can include a plurality of electrical connections. A PIC edge surface can extend around at least a portion of a perimeter of the PIC between the PIC front surface and a PIC back surface. A PIC optical port can be disposed on the PIC edge surface and can accept or emit an optical beam along a PIC optical axis. The PIC optical axis can be aligned with the substrate optical port when the PIC is attached to the substrate.

A multi-chip photonic assembly includes first and second photonic integrated circuits having first and second waveguides vertically stacked such that first vertical dimensions of the first and second waveguides occupy different horizontal planes in the stack. At least one of the first and second waveguides has a region that has a second vertical dimension that is larger than the first vertical dimension and either horizontally overlaps the other waveguide and/or vertically contacts the other waveguide. Light moving through one of the waveguides from the first vertical dimension to the other vertical dimension changes modes vertically so that the light moves from one waveguide to the other.

An optical waveguide package includes a substrate, and an optical waveguide layer on an upper surface of the substrate. The optical waveguide layer includes a cladding and a core in the cladding. The cladding has at least one first recess having a bottom surface and a first inner wall surface surrounding the bottom surface. The first inner wall surface of the at least one first recess is inclined and has an upper side outward from a lower side.

A circuit board (100) has a first surface (102). A semiconductor chip (200) (first semiconductor chip) is located at the first surface side (102) of the circuit board (100). An insulating layer (300) covers the first surface (102) of the circuit board (100) and the semiconductor chip (200). A conductive path (310) (first conductive path) is electrically connected to the semiconductor chip (200) and extends in the insulating layer (300). A waveguide (320) is optically coupled to the semiconductor chip (200) and extends in the insulating layer (300).

A fiber array unit (FAU) includes a substrate, a plurality of optical fibers, and a lid. The substrate includes: an optical window extending through a layer of non-transparent material, a plurality of grooves, and an alignment protrusion configured to mate with an alignment receiver. The plurality of optical fibers are disposed in the plurality of grooves. The alignment protrusion is configured to align the plurality of optical fibers with an external device when mated with the alignment receiver. The plurality of optical fibers is disposed between the lid and the substrate.

A connector assembly includes housing and one or more light guide members. Each light guide member includes a tube body, an extension column, a positioning member, and a fixing member. The tube body is located on the housing. The extension column extends downward from the tube body to a rear side of the housing. The positioning member is located on the extension column and inserted into a rear wall of the housing. The fixing member is located on the extension column and inserted into the rear wall. The fixing member includes a first bump protruding from the extension column toward the rear wall and a hook structure located on the first bump. When each light guide member is assembled onto the housing, the first bump is inserted into the rear wall, and the hook structure is hooked into the rear wall.

A coupling alignment device and method for a laser chip and a silicon-based optoelectronic chip are disclosed. The device comprises a transfer mold which includes a substrate, first protrusions, and second protrusions. The first protrusions are provided with through holes and are used for being clamped into first recesses in the laser chip; and the second protrusions are used for being clamped into second recesses in the silicon-based optoelectronic chip. The coupling alignment is achieved by etching the first recesses in the laser chip, etching the second recesses in the silicon-based optoelectronic chip, etching the first protrusions, the second protrusions, and the through holes in the transfer mold. A flip-chip suction nozzle is connected with the transfer mold, which is in alignment with the laser chip, and picks up the laser chip by means of the through holes. Then, the laser chip is assembled on the silicon-based optoelectronic chip by aligning and contacting the transfer mold with the silicon-based optoelectronic chip. The method is of high precision, high efficiency, low costs, and can achieve large-scale and mass production.

Disclosed herein are integrated photonics assemblies, circuits, systems and methods therefor. The systems can include a first integrated photonics assembly having a first functionality, in which the first assembly includes a plurality of modular photonic integrated subcircuits. Each subcircuit can be pre-fabricated and can be configured to transfer light to and receive light from another subcircuit based on the first functionality. An output port of a first subset of the subcircuits can be configured to be aligned with an input port of a second subset of the subcircuits. At least one subcircuit can be configured to be removed from the first integrated photonics assembly and connected to a second integrated photonics assembly having a second functionality. The first integrated photonics assembly can be different from the second integrated photonics assembly and the first functionality can be different from the second functionality.

A photonic integrated circuit (PIC) die are provided. The PIC die includes a set of optical connect grooves including a first groove aligning a core of a first optical fiber positioned with a first optical component in a first layer at a first vertical depth in a plurality of layers of a body of the die, and a second groove aligning a core of a second optical fiber positioned therein with a second optical component in a second, different layer at a second different vertical depth in the plurality of layers. The grooves may also have end faces at different lateral depths from an edge of the body of the PIC die. Any number of the first and second grooves can be used to communicate an optical signal to any number of layers at different vertical and/or lateral depths within the body of the PIC die.

Apparatus and method for detachably connecting at least one optical fiber of a detachable photonic plug to a photonic integrated circuit (PIC). The detachable photonic plug comprises: a detachable plug die; an optically transparent spacer coupled to the detachable plug die; and at least one optical fiber held between the detachable plug die and the spacer. On the PIC side, apparatus includes a receptacle adapted to receive a detachable photonic plug adapted to couple at least one optical fiber to a photonic integrated circuit (PIC); and a photonic bump of the PIC, the photonic bump having a least one fine alignment feature. The method comprises permanently mounting a receptacle over at least a portion of the PIC; after completion of mounting, inserting the detachable photonic plug into the receptacle; and after the detachable photonic plug is inserted in the receptacle, securing the detachable photonic plug in the receptacle.