A LCD device having a large pixel holding capacitance includes opposedly facing first and second substrates, and liquid crystal between them. The first substrate includes a video signal line, a pixel electrode, a thin film transistor having a first electrode connected to the video signal line and a second electrode connected to the pixel electrode, a first silicon nitride film formed above the second electrode, an organic insulation film above the first silicon nitride film, a capacitance electrode above the organic insulation film, and a second silicon nitride film above the capacitance electrode and below the pixel electrode. A contact hole etched in both the first and second silicon nitride films connects the second electrode and the pixel electrode to each other. A holding capacitance is formed by the pixel electrode, the second silicon nitride film and the capacitance electrode.

A method of manufacturing an array substrate is provided, which comprises: forming a first metal layer and an insulating layer in sequence on a base substrate, the insulating layer covering the first metal layer; forming an etch barrier layer on the insulating layer; etching the etching barrier layer and the insulating layer multiple times, wherein an effective blocking area of the etching barrier layer decreases successively in each etching to form a connection hole penetrating the insulating layer, the connection hole includes a plurality of via holes connected in sequence, and a slope angle of a hole wall of each via hole is smaller than a preset slope angle; and forming a second metal layer, the second metal layer being connected to the first metal layer through the connection hole.

A liquid crystal display device with a high aperture ratio is provided. A liquid crystal display device with low power consumption is provided. A display device includes a transistor and a capacitor. The transistor includes a first insulating layer, a first semiconductor layer in contact with the first insulating layer, a second insulating layer in contact with the first semiconductor layer, and a first conductive layer electrically connected to the first semiconductor layer via an opening portion provided in the second insulating layer. The capacitor includes a second conductive layer in contact with the first insulating layer, the second insulating layer in contact with the second conductive layer, and the first conductive layer in contact with the second insulating layer. The second conductive layer includes a composition similar to that of the first semiconductor layer. The first conductive layer and the second conductive layer are configured to transmit visible light.

A liquid crystal display including a first substrate on which a plurality of first pixels are defined, a first pixel electrode arranged for each of the first pixels on the first substrate, a second substrate arranged opposite the first substrate, a third substrate arranged on the second substrate and on which a plurality of second pixels are defined, a second pixel electrode arranged for each of the second pixels on the third substrate, and a fourth substrate arranged opposite the third substrate. Each of the first pixels has a first domain and each of the second pixels has a second domain, and a direction of the first domain of the first pixels and a direction of the second domain of the second pixels are different from each other.

An array substrate includes a base, a plurality of thin film transistors, a passivation layer, at least one reflective electrode, and at least one first connecting electrode. The array substrate has a display area. The thin film transistors are disposed in the display area on the base. The passivation layer covers the thin film transistors, and has at least one first via hole in the display area. The reflective electrode is disposed on a surface of the passivation layer facing away from the base, and is disposed in the display area and uncovers the first via hole. The first connecting electrode is disposed on a side of the reflective electrode away from the base. Each first connecting electrode is connected to a corresponding reflective electrode, and is connected to a source or a drain of a corresponding thin film transistor through a corresponding first via hole.

An array substrate, a display panel, and an electronic device are provided. The array substrate includes a substrate, a first conductive layer including a first connection part, a fourth insulating layer disposed on the first conductive layer and provided with a second via, and a second conductive layer disposed on the fourth insulating layer and in the second via. The second conductive layer includes a second electrode, and the second electrode is connected to the first connection part through the second via.

A display device includes: a first substrate, including: a gate line having an extension direction; a switch unit electrically connecting to the gate line; a pixel electrode electrically connecting to the switch unit; and a slit in the pixel electrode, wherein a virtual line parallel to the extension direction passes through an end point of the slit which is closest to the gate line, and the pixel electrode is divided into a first portion and a second portion by the virtual line, wherein the first portion is closer to the gate line than the second portion, the first portion and the second portion respectively have a first width and a second width along the extension direction, the first width is a maximum width of the first portion, the second width is a maximum width of the second portion, and the second width is less than the first width.

The present disclosure provides a positive photoresist composition including a major adhesive material and a photosensitizer, wherein the photoresist composition further includes a photoisomerizable compound which would be converted into an ionic structure with an increased degree of molecular polarity after ultraviolet irradiation. The formation of the ionic structure with increased polarity of the molecule reduces the adhesion between the positive photoresist and the organic film layer, facilitates stripping after formation of the via, and improves the product rate of pass. Further, the present disclosure provides a via-forming method using the positive resist composition, a display substrate including the via formed by the via-forming method, and a display device including the display substrate.

A display device, a method for controlling the same, and a display panel are provided, the display device includes: a transparent substrate; a plurality of electroluminescent devices arranged in an array on the substrate, a device with variable transmittance located between the electroluminescent devices and the substrate, the device with variable transmittance is configured so that a transmittance of the device with variable transmittance is switchable between a first transmittance and a second transmittance, and the first transmittance is greater than the second transmittance; and an image acquisition device on a side of the substrate away from the electroluminescent devices, in a case where the transmittance of the device with variable transmittance is switched to the first transmittance, external light irradiating the display device can pass through the device with variable transmittance and be incident on the image acquisition device.

A display device including a display area and a non-display area disposed outside the display area, the display device including a first display substrate, a second display substrate opposite to the first display substrate, and a sealing member disposed between the first display substrate and the second display substrate in the non-display area and coupling the first display substrate to the second display substrate, in which the first display substrate includes a first substrate and an organic layer disposed on the first substrate, the organic layer includes a plurality of dam patterns disposed in the non-display area, and the dam patterns include a first dam pattern not overlapping the sealing member and having a first trench formed on a surface of the first dam pattern, and a second dam pattern overlapping the sealing member.