An array substrate includes a first light-shielding insulation layer formed on the substrate, for block a light entering the substrate, and including a first region and a second region, and each is made of an insulation material; a first function layer formed on the second region, under a light-shielding function of the second region, an affection of light is avoided; a second function layer formed above the first region of the first light-shielding insulation layer and the first function layer, under the light-shielding function of the first light-shielding insulation layer, an affection of light is avoided; and a third function layer formed above the second function layer, under the light-shielding function of the first light-shielding insulation layer, an affection of light is avoided; wherein, each of the first, the second and the third function layer is a conductor material or a semiconductor material. A photo-leakage current can be avoided.

A step for forming an island-shaped semiconductor layer of a semiconductor device used in a display device is omitted in order to manufacture the semiconductor device with high productivity and low cost. The semiconductor device is manufactured through four photolithography processes: four steps for forming a gate electrode, for forming a source electrode and a drain electrode, for forming a contact hole, and for forming a pixel electrode. In the step for forming the contact hole, a groove portion in which a semiconductor layer is removed is formed, whereby formation of a parasitic transistor is prevented. An oxide semiconductor is used as a material of the semiconductor layer in which a channel is formed, and an oxide semiconductor having a higher insulating property than the semiconductor layer is provided over the semiconductor layer.

There provides an optimization method of thickness uniformity of alignment film, and the optimization method includes: providing a thin film transistor (TFT) array substrate on which a passivation layer is deposited; coating a photoresist on the passivation layer; dividing the TFT array substrate into different regions, and exposing, developing and etching the photoresist in different regions by respectively using a half tone mask and a common mask; removing the photoresists and depositing an ITO film after etching; etching the ITO film to obtain the TFT array substrate in which upper surfaces of the ITO film and the passivation layer are at a same level; and coating an alignment film on the upper surfaces of the ITO film and the passivation layer. Since the upper surfaces of the ITO film and the passivation layer are at the same level, the thickness of the alignment film coated thereon is uniform.

The present invention provides a manufacture method of an array substrate and an array substrate manufactured by the method. By employing one mask to achieve the via opening process to the flat layer and the first passivation layer, one mask can be saved to decrease the production cost and to reduce the process time; the conductive connection layer covering the first via on the flat layer and the second via on the first passivation layer are formed at the same time while forming the common electrode, and thus to prevent that the source/the drain and the flat layer to be exposed in the environment for eliminating the possibility that the two generate the reaction, which is beneficial for raising the electrical property of the array substrate and realizing the signal conduction. In the array substrate, the signal transmission is smooth, and the substrate possesses the great electrical property.

A marked pixel unit includes at least one active element, a first dielectric layer, a color filter unit, a second dielectric layer, and at least one pixel electrode. The active element includes a source, a gate, and a drain. The first dielectric layer is configured to cover the gate. The color filter unit is disposed above the first dielectric layer, and has an alignment opening. The second dielectric layer is disposed above the active element and the color filter unit, and has a contact hole. The pixel electrode is disposed above the second dielectric layer, and electrically connected to the drain through the contact hole. The contact hole of the second dielectric layer is located outside the alignment opening.

The present disclosure proposes a method of fabricating a color filter. The method includes: forming a permeable film on a glass substrate and drying the permeable film; and covering a black mask with a first hollow area, a red mask with a second hollow area, a green mask with a third hollow area, and a blue mask with a fourth hollow area on the dried permeable film successively, and only one of the four masks being covered each time; putting the permeable film covered by the masks into a particle solution corresponding to a respective color successively for forming the color filter comprising a black shielding area, a red area, a green area, and a blue area. The color filter is fabricated in a simpler manufacturing process. The thickness of the black shielding area of the color filter is accordance to the thickness of the RGB primary color area.

A mask is provided that includes a first graphic region and a second graphic region disposed along a first direction. The first graphic region comprises a first splicing exposure region. The second graphic region comprises a second splicing exposure region. The first splicing exposure region is used for, after being translated along a first vector, forming a first splicing auxiliary region, and the first splicing auxiliary region coincides with the second splicing exposure region.

An array substrate, a manufacturing method thereof, a display device, a thin-film transistor (TFT) and a manufacturing method thereof are disclosed. The method for manufacturing the TFT comprises: forming a pattern of an active layer and a gate insulating layer provided with a metal film on a base substrate; patterning the metal film by one patterning process, and forming patterns of a gate electrode, a source electrode, a drain electrode, a gate line and a data line; forming a passivation layer on the base substrate; patterning the passivation layer by one patterning process, and forming a source contact hole, a drain contact hole and a bridge structure contact hole; and forming a transparent conductive film on the base substrate, and removing partial transparent conductive film to form a source contact portion, a drain contact portion (214), a pixel electrode and a bridge structure. The manufacturing method can reduce the number of the patterning processes.

A COA substrate manufacturing method including: forming a TFT on a base substrate; forming a second insulation layer on the TFT; forming a color resist layer on the second insulation layer; forming a third insulation layer on the color resist layer; forming a through hole which reveals the drain electrode of the TFT; forming an ITO film layer on the third insulation layer; forming a photoresist layer on the ITO film layer; performing a light-shielding process to the photoresist layer on the vias-region ITO film layer and an exposure process to the photoresist layer on the non vias-region ITO film layer; developing the photoresist layer on the vias-region ITO and the non vias-region ITO film layers to obtain a photoresist layer plug covered on the vias-region ITO film layer. The present invention utilizes the photoresist to fill the through hole which can improve the quality of a display device.

A mask of a display device for forming a light shielding unit, which includes a first column spacer, a second column spacer, a light shielding layer, and a first groove, is capable of reducing the number of tones therein, the mask including: a first portion corresponding to the first column spacer; a second portion having substantially a same light transmittance as that of the first portion and corresponding to the second column spacer; a third portion corresponding to the light shielding layer; a fourth portion corresponding to a pixel region; and a fifth portion disposed between the first portion and the third portion to correspond to the first groove and having a light transmittance substantially the same as that of the fourth portion.