An electro-optical device includes a display region and a peripheral region, and includes a first substrate including a pixel electrode being disposed in the display region and having translucency, a transistor being disposed in the display region and being electrically coupled to the pixel electrode, a second substrate including a common electrode, and an electro-optical layer being arranged between the pixel electrode and the common electrode, wherein the first substrate or the second substrate includes a first layer having translucency and an insulating property, a second layer having translucency and an insulating property, and being disposed closer to the electro-optical layer than the first layer is, and a light shielding film being arranged between the first layer and the second layer and including tungsten, and the light shielding film includes a concave surface being in contact with the second layer.

A TFT substrate (20) and a CF substrate are connected to each other with a space therebetween via a seal section (22) disposed along the peripheral ends of the TFT substrate (20) and the CF substrate. A liquid crystal is sealed inside of the seal section (22). On a TFT substrate (20) portion inside of the seal section (22), preliminary wiring lines (39a, 39b) are formed along the seal section (22). On the TFT substrate (20), a conductor (41) is disposed between the seal section (22) and the preliminary wiring lines (39a, 39b) without being in contact with the seal section (22) and the preliminary wiring lines (39a, 39b).

A TFT substrate (20) and a CF substrate are connected to each other with a space therebetween via a seal section (22) disposed along the peripheral ends of the TFT substrate (20) and the CF substrate. A liquid crystal is sealed inside of the seal section (22). On a TFT substrate (20) portion inside of the seal section (22), preliminary wiring lines (39a, 39b) are formed along the seal section (22). On the TFT substrate (20), a conductor (41) is disposed between the seal section (22) and the preliminary wiring lines (39a, 39b) without being in contact with the seal section (22) and the preliminary wiring lines (39a, 39b).

A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

A pixel circuit includes a scanning signal terminal configured to receive a scanning signal, a data voltage terminal configured to receive a data voltage signal, a switching sub-circuit coupled to the scanning signal terminal and the data voltage terminal, and a latch sub-circuit coupled to the switching sub-circuit. The switching sub-circuit is configured to transmit the data voltage signal to the latch sub-circuit in response to receiving the scanning signal. The latch sub-circuit is configured to latch the data voltage signal to generate a first latch signal in a first display period and a second latch signal in a second display period.

A pixel circuit includes a scanning signal terminal configured to receive a scanning signal, a data voltage terminal configured to receive a data voltage signal, a switching sub-circuit coupled to the scanning signal terminal and the data voltage terminal, and a latch sub-circuit coupled to the switching sub-circuit. The switching sub-circuit is configured to transmit the data voltage signal to the latch sub-circuit in response to receiving the scanning signal. The latch sub-circuit is configured to latch the data voltage signal to generate a first latch signal in a first display period and a second latch signal in a second display period.

A display panel includes a first display sub-panel and a second display sub-panel disposed opposite to each other, the first display sub-panel including a plurality of first gate lines and the second display sub-panel including a plurality of second gate lines. The display panel further includes a plurality of single-way conducting switches, the first gate lines, the second gate lines and the single-way conducting switches being disposed in one-to-one correspondence, each of the single-way conducting switches having an input end which is electrically connected to the corresponding first gate line and an output end which is electrically connected to the corresponding second gate line, and each of the single-way conducting switches being unidirectionaly conducted from the corresponding first gate line to the corresponding second gate line.

A display panel includes a first display sub-panel and a second display sub-panel disposed opposite to each other, the first display sub-panel including a plurality of first gate lines and the second display sub-panel including a plurality of second gate lines. The display panel further includes a plurality of single-way conducting switches, the first gate lines, the second gate lines and the single-way conducting switches being disposed in one-to-one correspondence, each of the single-way conducting switches having an input end which is electrically connected to the corresponding first gate line and an output end which is electrically connected to the corresponding second gate line, and each of the single-way conducting switches being unidirectionaly conducted from the corresponding first gate line to the corresponding second gate line.

The present invention is notably directed to display device (1, 1a d), comprising a set of pixels, each having a layer structure (2, 2c, 2d) that includes: a bi-stable, phase change material (10), or bi-stable PCM, having at least two reversibly switchable states, in which the PCM exhibits two different values of refractive index and/or optical absorption; and a heating element (17, 17c, 17d), electrically insulated from the PCM (10) and in thermal communication with the PCM (10) in the layer structure (2, 2c, 2d). The display device further comprises a set of nonlinear, monostable resistive switching elements (21), each in electrical communication with the heating element (17, 17c, 17d) of one of the pixels. The resistive switching elements are designed so as to exhibit, each: a low resistance, unstable state, which allows the heating element (17, 17c, 17d) to be energized via the resistive switching element (21), so as to heat the PCM (10) and reversibly change a refractive index and/or an optical absorption thereof, in operation; and a high-resistance, stable state, which allows leakage currents to be mitigated, so as to prevent inadvertent switching of the PCM (10) from one of its states to the other, in operation. The device further comprises a controller (30) configured to energize any of the pixels via a respective one of the resistive switching elements (21), so as to switch the latter from its high-resistance state to its low resistance state, in order to energize a respective heating element (17, 17c, 17d) and, in turn, reversibly change a refractive index and/or an optical absorption of a respective PCM (10). The present invention is further directed to related devices or apparatuses, such as passive matrix addressing displays, and methods of operations.