A USB power supply apparatus supplies electric power to a USB power reception apparatus. A bus line connects the output of the power supply circuit and the USB power reception apparatus. A switch is provided on a path of the bus line. A feedback circuit feedback controls the power supply circuit such that the output voltage V.sub.OUT of the power supply circuit approaches a reference voltage V.sub.REF. A controller adaptively controls the reference voltage V.sub.REF based on an electrical state of the USB power supply apparatus.

A voltage supply regulator includes a first output resistor including a first terminal coupled to an output voltage of the voltage supply regulator and a second terminal; a first comparator including a first input coupled to a reference voltage, a second input coupled to the second terminal of the first output resistor, and an output coupled to a base of a first regulator transistor; a current mirror coupled to a collector of the first regulator transistor; and an slew rate detector coupled to the current mirror that includes a first terminal coupled to control electrodes of first and second transistors in the current mirror, and a detection bipolar junction transistor having a collector coupled to the control electrodes of the first and second transistors in the current mirror, and a base coupled to a second terminal of the capacitor.

A voltage supply regulator includes a first output resistor including a first terminal coupled to an output voltage of the voltage supply regulator and a second terminal; a first comparator including a first input coupled to a reference voltage, a second input coupled to the second terminal of the first output resistor, and an output coupled to a base of a first regulator transistor; a current mirror coupled to a collector of the first regulator transistor; and an slew rate detector coupled to the current mirror that includes a first terminal coupled to control electrodes of first and second transistors in the current mirror, and a detection bipolar junction transistor having a collector coupled to the control electrodes of the first and second transistors in the current mirror, and a base coupled to a second terminal of the capacitor.

System controller and method for a power converter. For example, a system controller for a power converter includes a logic controller configured to generate a modulation signal, and a driver configured to receive the modulation signal, generate a drive signal based at least in part on the modulation signal, and output the drive signal to a switch to affect a current flowing through an inductive winding for a power converter. Additionally, the system controller includes a voltage-to-voltage converter configured to receive a first voltage signal, the modulation signal, and a demagnetization signal, and to generate a second voltage signal based at least in part on the first voltage signal, the modulation signal, and the demagnetization signal.

A power supply detecting circuit includes a first voltage detecting module configured to detect an input voltage of a power supply module; a micro control unit (MCU) connected to the first voltage detecting module; a display module connected to the MCU; a second voltage detecting module configured to detect an output voltage of the power supply module; and a current detecting module configured to detect an output current of the power supply module. The MCU is capable of comparing the detected input voltage, the detected output voltage, and the detected output current of the power supply module with corresponding predetermined parameters and calculating an output power of the power supply module. The display module is capable of displaying the detected input voltage, the detected output voltage, the detected output current, and the output power of the power supply module.

A power supply detecting circuit includes a first voltage detecting module configured to detect an input voltage of a power supply module; a micro control unit (MCU) connected to the first voltage detecting module; a display module connected to the MCU; a second voltage detecting module configured to detect an output voltage of the power supply module; and a current detecting module configured to detect an output current of the power supply module. The MCU is capable of comparing the detected input voltage, the detected output voltage, and the detected output current of the power supply module with corresponding predetermined parameters and calculating an output power of the power supply module. The display module is capable of displaying the detected input voltage, the detected output voltage, the detected output current, and the output power of the power supply module.

According to one embodiment, in a semiconductor integrated circuit, a first input terminal of an error amplifier is electrically connected to a third node between a second node and a reference potential. A second input terminal of the error amplifier is electrically connected to a reference voltage. An output terminal of the error amplifier is electrically connected to a gate of an output transistor. A first input terminal of a comparator is electrically connected to a fourth node between the second node and the reference potential. A second input terminal of the comparator is electrically connected to the reference voltage. One end of a coupling capacitance is electrically connected to an output terminal of the comparator. A gate of an auxiliary transistor is electrically connected to the other end of the coupling capacitance. A drain of the auxiliary transistor is electrically connected to the second node.

A regulator includes a driving circuit, an amplifying circuit and an overvoltage protection circuit. The driving circuit is configured to receive an input voltage and provide an output voltage through an output terminal. The amplifying circuit is configured to control the driving circuit according to the output voltage. The overvoltage protection circuit is configured to conduct a first current from the output terminal of the overprotection circuit to a ground terminal. When the overvoltage protection circuit detects that a voltage level of a node coupled to the driving circuit is increased, the overvoltage protection circuit conducts a second current from the output terminal of the overprotection circuit to the ground terminal to lower the output voltage, in which the second current is larger than the first current.

Disclosed is a voltage reference buffer circuit including a first, second, third, and fourth bias generators and a first, second, third, and fourth driving components. The first, second, third, and fourth bias generators generate bias voltages to control the first, second, third, and fourth driving components respectively. The first, second, third, and fourth driving components are coupled in sequence, wherein the first and second driving components are different types of transistors and jointly output a first reference voltage, the third and fourth driving components are different types of transistors and jointly output a second reference voltage, and the group of the first and second driving components is separated from the group of the third and fourth driving components by a resistance load.

Disclosed is a voltage reference buffer circuit including a first, second, third, and fourth bias generators and a first, second, third, and fourth driving components. The first, second, third, and fourth bias generators generate bias voltages to control the first, second, third, and fourth driving components respectively. The first, second, third, and fourth driving components are coupled in sequence, wherein the first and second driving components are different types of transistors and jointly output a first reference voltage, the third and fourth driving components are different types of transistors and jointly output a second reference voltage, and the group of the first and second driving components is separated from the group of the third and fourth driving components by a resistance load.