A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.

Embodiments described herein relate to an LDO circuit device and overcurrent protection circuit of an LDO circuit. An overcurrent protection circuit is added to an LDO circuit to process an output current signal of the LDO circuit. When the output current signal of the LDO circuit increases, a voltage of a gate drive signal of a power switch in the LDO circuit is increased through adjustment performed by the overcurrent protection circuit, thereby declining the current capability of the power switch in the LDO circuit and restricting an output current thereof from continuing to increase. After feedback regulation, the output current of the LDO finally reaches to a stable value.

Embodiments described herein relate to an LDO circuit device and overcurrent protection circuit of an LDO circuit. An overcurrent protection circuit is added to an LDO circuit to process an output current signal of the LDO circuit. When the output current signal of the LDO circuit increases, a voltage of a gate drive signal of a power switch in the LDO circuit is increased through adjustment performed by the overcurrent protection circuit, thereby declining the current capability of the power switch in the LDO circuit and restricting an output current thereof from continuing to increase. After feedback regulation, the output current of the LDO finally reaches to a stable value.

Disclosed is a voltage reference buffer circuit including a first, second, third, and fourth bias generators and a first, second, third, and fourth driving components. The first, second, third, and fourth bias generators generate bias voltages to control the first, second, third, and fourth driving components respectively. The first, second, third, and fourth driving components are coupled in sequence, wherein the first and second driving components are different types of transistors and jointly output a first reference voltage, the third and fourth driving components are different types of transistors and jointly output a second reference voltage, and the group of the first and second driving components is separated from the group of the third and fourth driving components by a resistance load.

Disclosed is a voltage reference buffer circuit including a first, second, third, and fourth bias generators and a first, second, third, and fourth driving components. The first, second, third, and fourth bias generators generate bias voltages to control the first, second, third, and fourth driving components respectively. The first, second, third, and fourth driving components are coupled in sequence, wherein the first and second driving components are different types of transistors and jointly output a first reference voltage, the third and fourth driving components are different types of transistors and jointly output a second reference voltage, and the group of the first and second driving components is separated from the group of the third and fourth driving components by a resistance load.

A circuit comprises an optical coupling including an illuminator optically coupled to an optical sensor to output a voltage from the optical sensor based on intensity of illumination from the illuminator. The circuit includes a voltage input node with a resistance connected in series between the voltage input and a Zener diode. A method includes powering an illuminator with current from a first voltage input node. The method includes sensing illumination level in illumination from the illuminator with a sensor and outputting output proportionate to illumination sensed by the sensor indicative of voltage detected at the voltage input node. The method can include limiting current between the voltage input node and the illuminator.

The present disclosure relates to a device comprising: N low drop-out voltage regulators, N being an integer greater than or equal to 1; a first circuit configured to deliver N set-point voltages to the N regulators which are proportional to the same first current; and a second circuit configured to deliver the first current, wherein the first current is proportional to a reference current modulated based on a sum of the inrush currents of the N regulators.

An overcurrent protection circuit configured to limit an output current flowing through an output transistor includes a sense transistor that provides a sense current proportional to the output current, a sense resistor through which the sense current flows, a current limiting circuit that detects a sense voltage generated by the sense resistor and controls a gate voltage of the output transistor, and a current correction circuit that provides the sense resistor with a corrected sense current added to the sense current based on a difference of voltage between a drain voltage of the output transistor and a drain voltage of the sense transistor.

An overcurrent protection circuit configured to limit an output current flowing through an output transistor includes a sense transistor that provides a sense current proportional to the output current, a sense resistor through which the sense current flows, a current limiting circuit that detects a sense voltage generated by the sense resistor and controls a gate voltage of the output transistor, and a current correction circuit that provides the sense resistor with a corrected sense current added to the sense current based on a difference of voltage between a drain voltage of the output transistor and a drain voltage of the sense transistor.

A semiconductor integrate circuit device includes: an output transistor connected between a voltage input terminal to which a DC voltage is input and a voltage output terminal; a control circuit that controls on/off of the output transistor; a proportional current generation circuit capable of generating a current proportionally smaller than a current flowing through the output transistor; an overcurrent detection circuit capable of detecting an overcurrent state of an output current by determining whether a current flowing through the output transistor is equal to or greater than a first predetermined current value, based on the current generated by the proportional current generation circuit; and a retry circuit that generates and outputs a signal for intermittently turning off the output transistor in response to the overcurrent detection circuit detecting the overcurrent state.