To provide an overcurrent protection circuit which prevents an excessive current from flowing to an output terminal for a long time, and a semiconductor device and a voltage regulator each equipped with the overcurrent protection circuit. An overcurrent protection circuit is configured to include a first transistor which allows a current proportional to an output current flowing through an output transistor to flow, a constant current circuit which allows a reference current to flow, a comparison circuit which compares the current flowing through the first transistor and the reference current, and a control circuit which controls a gate of the output transistor by a signal outputted from the comparison circuit.

To provide an overcurrent protection circuit which prevents an excessive current from flowing to an output terminal for a long time, and a semiconductor device and a voltage regulator each equipped with the overcurrent protection circuit. An overcurrent protection circuit is configured to include a first transistor which allows a current proportional to an output current flowing through an output transistor to flow, a constant current circuit which allows a reference current to flow, a comparison circuit which compares the current flowing through the first transistor and the reference current, and a control circuit which controls a gate of the output transistor by a signal outputted from the comparison circuit.

Provided is a sensor device wherein malfunction due to a negative surge is suppressed. This sensor device is provided with: a sensor element wherein electrical characteristics change corresponding to physical quantities; a signal processing circuit that processes output signals of the sensor element; a first transistor element that supplies currents to the sensor element and the signal processing circuit; a control circuit that controls a base current of the first transistor element; a power supply terminal; and a ground terminal. The sensor device is characterized in that the control circuit is provided with a limiting section that limits a current flowing from the ground terminal toward a base terminal of the first transistor element.

Provided is an overcurrent protection circuit including an overcurrent detection unit configured to compare an output current flowing through a switch element and a predetermined overcurrent detection value to generate an overcurrent detection signal, an output activation detection unit configured to compare an output voltage and a predetermined threshold voltage to generate an output activation detection signal, a logic unit configured to combine the overcurrent detection signal and the output activation detection signal to generate a logic operation signal, and a diagnostic output unit configured to provide diagnostic output, the logic unit shifting the logic operation signal to a logic level of abnormal state when the overcurrent detection signal is shifted to a logic level of overcurrent detection state and holding the logic operation signal at that logic level, unless the output activation detection signal is shifted to a logic level of output activation state.

Provided is an overcurrent protection circuit including an overcurrent detection unit configured to compare an output current flowing through a switch element and a predetermined overcurrent detection value to generate an overcurrent detection signal, an output activation detection unit configured to compare an output voltage and a predetermined threshold voltage to generate an output activation detection signal, a logic unit configured to combine the overcurrent detection signal and the output activation detection signal to generate a logic operation signal, and a diagnostic output unit configured to provide diagnostic output, the logic unit shifting the logic operation signal to a logic level of abnormal state when the overcurrent detection signal is shifted to a logic level of overcurrent detection state and holding the logic operation signal at that logic level, unless the output activation detection signal is shifted to a logic level of output activation state.

Provided is a voltage regulator capable of suppressing fluctuation in a limited current. The voltage regulator includes: a first differential amplifier circuit configured to compare a voltage based on an output voltage and a reference voltage to each other, to thereby output a first voltage; a second differential amplifier circuit configured to compare the first voltage and a second voltage to each other, to thereby output a third voltage; a first transistor configured to receive the third voltage at a gate thereof such that the output voltage is generated at a drain thereof; a second transistor, which includes a gate connected in common to the gate of the first transistor and has a predetermined size ratio to the first transistor; and a voltage generating unit, which includes one end connected to a drain of the second transistor and is configured to generate the second voltage at the one end.

A low-dropout voltage regulator comprises an output terminal for providing an output voltage regulated as a function of a reference voltage, and for providing an output current, and additionally comprising an output current limiting unit. The current limiting unit comprises a replicator for replicating the output current to provide a mirror current of the output current, a comparator circuit for comparing the mirror current with a reference current, and a feedback circuit for supplying feedback to the regulator in order to limit the output current when the mirror current is greater than the reference current. The mirror current is injected into the output terminal.

A low-dropout voltage regulator comprises an output terminal for providing an output voltage regulated as a function of a reference voltage, and for providing an output current, and additionally comprising an output current limiting unit. The current limiting unit comprises a replicator for replicating the output current to provide a mirror current of the output current, a comparator circuit for comparing the mirror current with a reference current, and a feedback circuit for supplying feedback to the regulator in order to limit the output current when the mirror current is greater than the reference current. The mirror current is injected into the output terminal.

A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.

A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.