This application is directed to a bias circuit. The bias circuit includes a biasing voltage reference circuit including at least a first transistor. The biasing voltage reference circuit is configured to output a first voltage that depends on a threshold voltage of the first transistor. The bias circuit also includes a differential input circuit coupled to the biasing voltage reference circuit and having two differential inputs. The differential input circuit is configured to receive the first voltage and a reference voltage and generate a second voltage based on a difference between the first voltage and the reference voltage. The bias circuit further includes a buffer circuit coupled to the differential input circuit. The buffer circuit is configured to receive the second voltage and generate a bias voltage based on the second voltage. The bias voltage depends on the threshold voltage of the first transistor.

In an example, a system includes an amplifier configured to produce a bandgap voltage reference. The system also includes a current source configured to provide a current to bias the amplifier. The system includes a switching circuit configured to receive a first current replica signal and a second current replica signal, the switching circuit further configured to cause the current source to provide the current to bias the amplifier based on either the first current replica signal or the second current replica signal.

Disclosed is an integrated circuit including a first bias current generating circuit. The first bias current generating circuit includes a first amplifier receiving a reference voltage and a first voltage and amplifying a difference between them to output a first output voltage, a first bias current generator receiving the first output voltage and outputting a first bias current in response to the first output voltage, a variable resistor receiving the first bias current and outputting the first voltage in response to the first bias current and a calibration code, a second bias current generator receiving the first output voltage and outputting a second bias current to a peripheral circuit in response to the first output voltage, and a third bias current generator receiving the first output voltage and outputting a third bias current to an external device through a first pad in response to the first output voltage.

A switching driver circuit may have an output stage having an output switch connected between a switching voltage node and an output node. A switch network may control a switching voltage at the switching voltage node so that in one mode the switching voltage node is coupled to a positive voltage and in another mode the switching voltage node is coupled to ground voltage via a first switching path of the switch network. The circuit may also include an n-well switching block operable to, when the first switching voltage node is coupled to a positive voltage, connect the n-well of the first output switch to the switching voltage node, and, when the first switching voltage node is coupled to the ground voltage, connect the n-well of the first output switch to a first ground which is separate to the first switching voltage node and independent of the first switching path.

In accordance with an embodiment, a power supply circuit includes: a first transistor device comprising a first gate associated with a first transconductance and a second gate associated with a transconductance greater than the first transconductance; and a second transistor device including a third gate associated with a second transconductance and a fourth gate associated with a transconductance greater than the second transconductance. The second transistor device is configured to supply power to at least one load, the first and the third gates are controlled by a closed regulation loop, and the second and the fourth gates are controlled by a sampled reference voltage.

A semiconductor device includes a substrate, a circuit having a transistor formed on the substrate, an oscillation circuit generating a frequency signal, a substrate voltage generation circuit generating a substrate voltage in accordance with the frequency signal from the oscillation circuit, and a control circuit varying a frequency of the frequency signal from the oscillation circuit during a stand-by period of the circuit.

A substrate voltage control circuit comprising: a first connection terminal; a second connection terminal; a substrate voltage control terminal; a first switch having a first source, a first drain, and a first gate, the first source being connected to the substrate voltage control terminal, the first drain being connected to the first connection terminal; a first resistor connected between the first gate and the second connection terminal; a second switch having a second source, a second drain, and a second gate, the second source being connected to the substrate voltage control terminal, the second drain being connected to the second connection terminal; and a second resistor connected between the second gate and the first connection terminal.

A voltage detector operates to detect a system power supply voltage and generate a trigger signal. A control signal generator responds to the trigger signal and generates a control signal. A DC bias generator responds to the control signal by generating a DC bias. The control signal controls the DC bias to have a first value when the power supply voltage is a first voltage and have a second value when the power supply voltage is a second voltage different from the first voltage, wherein the first value is different from the second value. A dynamic DC bias is generated which can not only support a larger voltage scope, but also significantly improves signal to noise ratio. The system power supply detection may concern stop/start operation of an automobile engine.

A selective protection circuit includes a current-limiting module and a control module, where the current-limiting module includes a switch unit, and the switch unit includes a first end, a second end, and a control end; the first end is connected to a positive electrode of a bus voltage of an HVDC power supply, and the second end is connected to a positive electrode of a power supply of a voltage pre-regulator circuit in a load branch connected to the current-limiting module; the control end is connected to the control module; and the control module is configured to output a control signal to the control end when a value of a total current flowing through the switch unit is greater than or equal to a preset threshold, so as to switch off the switch unit.

A block of logic gates has MOS transistors whose body terminals are connected with a body voltage rail and whose source terminals are connected with a logic reference voltage rail. The logic reference voltage rail is connected to the body voltage rail via a resistor. The resistor creates a negative feedback loop for leakage currents that stabilizes a reverse body bias voltage and reduces the influence of temperature, voltage, and process variations.

The block may be NMOS, PMOS, or CMOS. In the case of CMOS, there are two body voltage rails, powered by a voltage source, two logic reference voltage rails, and two resistors. The reverse body bias voltages over the two resistors may be stabilized by decoupling capacitors. The two resistors may be trimmable. The resistors may be calibrated such that leakage currents are at a minimum value and the logic gates can switch just fast enough.