A method and apparatus for identifying data that is to be accessible in a low power state of a data storage device, and store this data in a physical (or logical) block that will be accessible in a low power state of the data storage device. Low power accessible data may be identified by host metadata of the data, indicating access is needed in a low power state. In other embodiments, the data storage device may learn the power state in which data should be accessible. In these embodiments, a controller stores information regarding the power state of a namespace in which the data is stored as an indicator to make the data accessible in a low power state. Alternatively, the controller stores a previous power state in which the data was accessed as an indicator to make the data accessible in a low power state.

A storage system comprises one or more storage devices, power supplies supplying power to the storage device, a processor that performs in response to determining that the total power consumption of the one or more storage devices is less than a first percentage threshold of a load of the active power supplies, deactivating one or more of the active power supplies until the total power consumption is equal to or greater than the first percentage threshold of a load of each of the active power supplies, and in response to determining that the total power consumption is equal to or greater than a second percentage threshold of a load of each of the active power supplies, activating one or more of the deactivated ones of the power supplies until the total power consumption is less than the second percentage threshold of the load of each of the active power supplies.

A power management integrated circuit (PMIC) is described for providing system management bus (SMB) isolation, along with memory sub-systems which include such a PMIC and methods of operating such devices. In one embodiment, a PMIC comprises a voltage supply input, power management circuitry, and elements of a SMB. The SMB elements can include an SMB input, an SMB hot swap controller coupled to the SMB input, one or more SMBs, and one or more SMB outputs. When integrated with a memory sub-system, one SMB output can be connected to a memory controller and another SMB output to a microcontroller. During different power states (e.g., normal or low power states), certain outputs can be isolated in order to manage communications on the SMB during the different power states of the memory sub-system using the PMIC.

A power management integrated circuit (PMIC) is described for providing system management bus (SMB) isolation, along with memory sub-systems which include such a PMIC and methods of operating such devices. In one embodiment, a PMIC comprises a voltage supply input, power management circuitry, and elements of a SMB. The SMB elements can include an SMB input, an SMB hot swap controller coupled to the SMB input, one or more SMBs, and one or more SMB outputs. When integrated with a memory sub-system, one SMB output can be connected to a memory controller and another SMB output to a microcontroller. During different power states (e.g., normal or low power states), certain outputs can be isolated in order to manage communications on the SMB during the different power states of the memory sub-system using the PMIC.

A dual disk spindle motor hard disk drive includes a first portion having a first spindle motor and a first disk media stack mounted thereon and housed in a first enclosure, and a second portion having a coaxial second spindle motor and a second disk media stack mounted thereon and housed in a second enclosure, where the second portion further includes both the first actuator and head sliders corresponding to the first disk stack as well as the second actuator and head sliders corresponding to the second disk stack. The first and second portions are coupled together such that the open sides of the enclosures mate, referred to herein as a clamshell configuration, and each separate spindle motor is configured to operate independently of the other. With independent control of multiple spindle motors, various control functions may be utilized to address power consumption and temperature control.

A dual disk spindle motor hard disk drive includes a first portion having a first spindle motor and a first disk media stack mounted thereon and housed in a first enclosure, and a second portion having a coaxial second spindle motor and a second disk media stack mounted thereon and housed in a second enclosure, where the second portion further includes both the first actuator and head sliders corresponding to the first disk stack as well as the second actuator and head sliders corresponding to the second disk stack. The first and second portions are coupled together such that the open sides of the enclosures mate, referred to herein as a clamshell configuration, and each separate spindle motor is configured to operate independently of the other. With independent control of multiple spindle motors, various control functions may be utilized to address power consumption and temperature control.

An I/O latency tracking apparatus for storage devices includes: an I/O command generator generating an I/O command for a storage device; an I/O processor providing an I/O request to the storage device based on the I/O command and completing the I/O command by polling the storage device to check I/O completion after sleeping for a sleep time; and a sleep time adjustment unit adjusting the sleep time based on a sequence combination composed of two latest I/O sleep results among oversleep and undersleep results obtained during the polling process.

A method for power management of a storage system unit, the method may include selecting a power reduction measure out of (a) a shutdown of at least one stateless compute node out of stateless compute nodes of the storage system unit, and (b) an other power reduction measure that does not involve the shutdown of the at least one stateless compute node, while prioritizing the shutdown of the at least one stateless compute node over the other power reduction measure; wherein the storage system unit further comprises storage nodes; wherein states related to communications with client computers (i) are maintained in the storage nodes, and (ii) are not stored on the stateless compute nodes; and applying the power reduction measure based on the selecting.

An electronic apparatus and a hot-swappable storage device thereof are provided. The hot-swappable storage device includes a carrier, a connector, a controller, and a wireless communication interface. The carrier is configured to carry a plurality of storage components. The connector is configured to be electronically connected to a host end for performing a data transfer operation. The controller detects a connection status between the connector and the host end. The wireless communication interface decides whether to perform the data transfer operation according to the connection status.

An electronic apparatus and a hot-swappable storage device thereof are provided. The hot-swappable storage device includes a carrier, a connector, a controller, and a wireless communication interface. The carrier is configured to carry a plurality of storage components. The connector is configured to be electronically connected to a host end for performing a data transfer operation. The controller detects a connection status between the connector and the host end. The wireless communication interface decides whether to perform the data transfer operation according to the connection status.