A memory system having a plurality of memory components and a controller, operatively coupled to the plurality of memory components to: store data in the memory components; communicate with a host system via a bus; service the data to the host system via communications over the bus; communicate with a processing device that is separate from the host system using a message passing interface over the bus; and provide data access to the processing device through communications made using the message passing interface over the bus.

A system comprises a plurality of computing devices that are communicatively coupled via a network and have a file system distributed among them, and comprises one or more file system request buffers residing on one or more of the plurality of computing devices. File system choking management circuitry that resides on one or more of the plurality of computing devices is operable to separately control: a first rate at which a first type of file system requests (e.g., one of data requests, data read requests, data write requests, metadata requests, metadata read requests, and metadata write requests) are fetched from the one or more buffers , and a second rate at which a second type of file system requests (e.g., another of data requests, data read requests, data write requests, metadata requests, metadata read requests, and metadata write requests) are fetched from the one or more buffers.

Aspects of the present disclosure relate to data deduplication (dedup) techniques for storage arrays. In embodiments, a sequence of input/output (IO) operations in an IO stream received from one or more host devices by a storage array are identified. Additionally, a determination is made as to whether previously received IO operations match the identified IO based on an IO rolling offsets empirical distribution model. Further, one or more data deduplication (dedup) techniques are performed on the matching IO sequence based on a comparison of a source compression technique and a target compression technique related to the identified IO sequence.

A memory module comprises a volatile memory subsystem, a non-volatile memory subsystem, and a module controller coupled to the volatile memory subsystem and to the non-volatile memory subsystem. The module controller is configurable to control data transfers between the volatile memory subsystem and the non-volatile memory subsystem. The module controller includes a data selection circuit configurable to pre-search data transferred from the non-volatile memory with respect to one or more search criteria before providing the pre-select data relevant to the one or more search criteria to the volatile memory subsystem.

Systems and methods are disclosed, including rebuilding a logical-to-physical (L2P) data structure of a storage system subsequent to relocating assigned marginal group of memory cells of a memory array of the storage system, such as when resuming operation from a low-power state, including an asynchronous power loss (APL).

An embodiment may involve a network interface module; volatile memory configured to temporarily store data packets received from the network interface module; high-speed non-volatile memory; an interface connecting to low-speed non-volatile memory; a first set of processors configured to perform a first set of operations that involve: (i) reading the data packets from the volatile memory, (ii) arranging the data packets into chunks, each chunk containing a respective plurality of the data packets, and (iii) writing the chunks to the high-speed non-volatile memory; and a second set of processors configured to perform a second set of operations in parallel to the first set of operations, where the second set of operations involve: (i) reading the chunks from the high-speed non-volatile memory, (ii) compressing the chunks, (iii) arranging the chunks into blocks, each block containing a respective plurality of the chunks, and (iv) writing the blocks to the low-speed non-volatile memory.

Staging data on a storage element integrating fast durable storage and bulk durable storage, including: receiving, at a storage element integrating fast durable storage and bulk durable storage, a data storage operation from a host computer; storing data corresponding to the data storage operation within fast durable storage in accordance with a first data resiliency technique; and responsive to detecting a condition for transferring data between fast durable storage and bulk durable storage, transferring the data from fast durable storage to bulk durable storage in accordance with a second data resiliency technique.

The operational performance and the I/O performance of Snapshots in a storage system are balanced. In a storage system, meta information of data appended to a log structured area is composed of meta information of a first tier and meta information of a second tier which correlate location information of data in a logical volume and location information of data in the log structured area. When creating a snapshot of the logical volume, a data management unit creates, in the same meta information area as a replication source, a replication of the meta information of the first tier stored in a plurality of meta information areas assigned to a plurality of controllers. A data control unit accesses the data of the log structured area from the logical volume, and accesses the data of the log structured area from the snapshot.

A computer-implemented method includes receiving custom metadata for several data items, the data items having system metadata associated therewith, selecting, based on the custom metadata, some of the data items to move between a primary storage system and a secondary storage system, and moving the selected data item(s) between the primary storage system and the secondary storage system. A computer program product includes a computer readable storage medium having program instructions embodied therewith. The program instructions are executable by a computer to cause the computer to perform the foregoing method. A system includes a processor and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor. The logic is configured to perform the foregoing method.

A system including a machine learning processing device and a memory device with microbumps is disclosed. A machine learning processing device is for performing a machine learning operation, where the machine learning processing device includes a first set of microbumps. A memory device is for storing data for the machine learning operation, where the memory device includes a second set of microbumps. The first set of microbumps of the memory device are coupled with the second set of microbumps of the machine learning processing device. The first set of microbumps of the memory device and the second set of microbumps of the machine learning processing device are to transmit the data for the machine learning operation.