File access statistics associated with a content file are maintained by a file tier agent of a secondary storage system. The content file is accessible via a primary storage system. A target storage tier corresponding to the file access statistics associated with the content file is determined according to one or more policies. At least a portion of data of the content file is migrated to the determined storage tier while accessibility of the content file via the primary storage system is maintained.

A system for tracking memory access patterns to be used in making data placement and migration policies. The system includes a processing unit and a system memory. The system memory includes a local memory and a remote memory, each of which having mapped thereon, a plurality of memory pages. Each of the plurality of memory pages corresponds to one or more physical addresses. A set of attributes for each memory page is stored in a physical attribute table (PAT). The PAT is looked up and the attributes updated when a memory access is detected. Attributes stored in the PAT are used to control the movement of memory pages between the local memory and the remote memory. When the attributes in the PAT indicate a remote memory page is being accessed frequently by the processing unit, the remote memory page is moved from the remote memory to the local memory.

Data recovery in a virtual storage system, including: detecting, within storage provided by a first tier of storage of the virtual storage system, data loss within a dataset, wherein recovery data for the dataset is stored in a second tier of storage; determining a recovery point for the dataset up to which a consistent version of the dataset is recoverable from the recovery data stored in the second tier of storage; and restoring, within the storage provided by the first tier of storage of the virtual storage system, the consistent version of the dataset.

Devices and techniques for adjustable memory device write performance are described herein. An accelerated write request can be received at a memory device from a controller of the memory device. The memory device can identify that a target block for external writes is opened as a multi-level cell block. The memory device can then write data for the accelerated write request to the target block using a single-level cell encoding.

A computer-implemented method, according to one embodiment, includes: receiving, at a clustered filesystem from a formatted filesystem, a request to perform a data integrity check for a portion of data. A determination is made as to whether the request includes a filesystem type of the portion of data, and in response to determining that the request includes a filesystem type of the portion of data, another determination is made as to whether the clustered filesystem supports the data integrity check for the filesystem type. In response to determining the clustered filesystem supports the data integrity check, another determination is made as to whether the portion of data is currently available. Furthermore, the computer-implemented method includes causing the data integrity check to be performed in response to determining that the portion of data is currently available. Results of performing the data integrity check are also sent to the formatted filesystem.

A storage device for booting a host computing device includes a first storage memory region having a first storage memory controller, a second storage memory region having a second storage memory controller, and a resilient boot controller. The resilient boot controller is configured to store boot code in the first storage memory region, prevent write access by the host computing device through the first storage memory controller to the first storage memory region, detect a reset of the host computing device through the input/output interface, copy at least a portion of the boot code from the first storage memory region to the second storage memory region, responsive to detection of the reset of the host computing device, and enable read access of the copied boot code by the host computing device through the second storage memory controller of the second storage memory region, responsive to the copy operation.

An apparatus comprises a processing device. The processing device is configured to persistently store metadata pages on a plurality of storage devices. The metadata pages are organized into buckets. The processing device is configured to access a given metadata page based at least in part on a bucket identifier where the given metadata page corresponds to a given logical volume. The bucket identifier comprises a first portion comprising an indication of a given bucket range that corresponds to the given logical volume and a second portion comprising an indication of an offset into the given bucket range that corresponds to a grouping of buckets that correspond to the given logical volume. The grouping of buckets corresponds to the given logical volume. The bucket identifier further comprises a third portion comprising an indication of an offset into the grouping of buckets that corresponds to the bucket comprising the given metadata page.

A computing device, a method, and a computer readable medium for transferring data objects predictively to reduce consumption of resources. In some embodiments, a computing device includes: a memory; and a processor coupled to the memory. The processor is configured to store data objects in a storage system. The storage system is a multi-tier storage system. Storage of the data objects includes: determining a future demand status for at least one data object stored in the storage system based on a set of access activity rules; and moving the at least one data object between tiers of the storage system in response to the determined future demand status being different from a current demand status of the at least one data object to reduce consumption of resources in which to store that data object.

A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.

The present application describes embodiments of an interface for coupling flash memory and dynamic random access memory (DRAM) in a processing system. Some embodiments include a dedicated interface between a flash memory and DRAM. The dedicated interface is to provide access to the flash memory in response to instructions received over a DRAM interface between the DRAM and a processing device. Some embodiments of a method include accessing a flash memory via a dedicated interface between the flash memory and a dynamic random access memory (DRAM) in response to an instruction received over a DRAM interface between the DRAM and a processing device.