Patent classifications
G06F9/4825
Time-dependent action system
In one embodiment, a system includes a memory, a processing device including a device processor; and a device clock, and a peripheral device including an interface to share data with the processing device, a hardware clock, and processing circuitry to write respective interrupt signaling messages to the memory responsively to respective hardware clock values of the hardware clock, and wherein the device processor is configured, responsively to the respective interrupt signaling messages being written to the memory, to perform a time-dependent action.
Method for executing, within a multitasking onboard system, an application timed according to a plurality of different time domains including interruption management
A method for executing an application in a multitasking system is provided. The application is composed of at least one task for which the temporal triggering is specified in a first temporal reference frame that is asynchronous relative to the physical time, called first external clock domain, defined by a synchronous basic clock with changes of state of a peripheral device of the system. The method comprises a set of steps executed by the system upon reception of an occurrence of an interrupt in order to render the execution of the task deterministic or quasi-deterministic.
CONTROL METHOD FOR VIRTUAL MACHINE SYSTEM, AND VIRTUAL MACHINE SYSTEM
The virtual machine system according to the present invention comprises: physical processors which each include an interrupt controller including an interrupt timer; and a virtualization unit which allocates computer resources including the physical processors and physical memories to a plurality of virtual machines. The virtualization unit allocates, to the plurality of virtual machines, virtual processors that are created by virtualizing the physical processors, sets one of the physical processors into either a shared processor mode or an exclusive processor mode, and then sets the interrupt timer of the physical processor that has been set into either the shared processor mode or the exclusive processor mode, into either a shared timer mode or an exclusive timer mode.
METHOD AND APPARATUS FOR DISTRIBUTING TASKS OF AUTOSAR OPERATING SYSTEM
Provided are a method of distributing tasks of an AUTomotive Open System Architecture (AUTOSAR) operating system and managing OsTask using OsAlarm in the AUTOSAR operating system, the method comprises, storing in Counter_BSW a value of a counter at a time when a function for setting an alarm for a basic software (BSW) module is called, storing in Counter_RTE the value of the counter at a time when a function for setting an alarm for an application software (ASW) module is called and correcting an offset value of the alarm for the ASW module using a value of Counter_BSW and a value of Counter_RTE.
Throttling circuitry
Techniques are disclosed relating to processor power control and interrupts. In one embodiment, an apparatus includes a processor configured to assert an indicator that the processor is suspending execution of instructions until the processor receives an interrupt. In this embodiment, the apparatus includes power circuitry configured to alter the power provided to the processor based on the indicator. In this embodiment, the apparatus includes throttling circuitry configured to, in response to receiving a request from the power circuitry to alter the power provided to the processor, block the request until the end of a particular time interval subsequent to receipt of the request or de-assertion of the indicator. In some embodiments, the particular time interval corresponds to latency between the processor receiving an interrupt and de-asserting the indicator.
METHOD, DEVICE, AND COMPUTER-READABLE STORAGE MEDIUM FOR CALLING A PROCESS
The present disclosure relates to a method and device for calling a process. The method includes: setting a call frequency for a process to be called by a designated application, based on a usage state of the designated application; and calling the process at the set call frequency.
Timer Processing Method, Apparatus, Electronic Device and Computer Storage Medium
Timer processing method, apparatus, electronic device and computer storage medium are provided. The timer processing method includes: determining to perform timer switching on a virtual local timer used by a virtual processor according to preset timer switching condition(s); determining a physical processor that runs the virtual processor, and switching a physical local timer currently used by the physical processor to a physical global timer; and performing a timer configuration for the virtual processor to enable the physical local timer to act as a timer of the virtual processor. Through the embodiments of the present disclosure, additional overheads of a virtual machine system caused by operations of conversion of virtual timer and physical timer are avoided.
DEVICE MANAGEMENT SYSTEM AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM STORING DEVICE MANAGEMENT PROGRAM
A device management system includes an automatic updater that automatically generates an automatic F/W update task in accordance with an automatic F/W update plan which is a setting for automatically generating the automatic F/W update task as a task for updating firmware of an image forming apparatus. The automatic F/W update plan includes specifying of firmware for update and a mode in which the update is fully executed on all electronic apparatuses of a target of the software update. The automatic updater automatically generates the automatic F/W update task in accordance with the automatic F/W update plan at a specific timing in a repeat manner.
ACCURATE TIMESTAMP OR DERIVED COUNTER VALUE GENERATION ON A COMPLEX CPU
Timekeeping on a computing device is deterministically performed by implementing two successive calls to a time function that returns current time based on a continuously running counter that is maintained in one or more cores of the device's CPU. The same fixed time computation parameters are used in each call, with the single variable being a value that is read from the counter. For the initial call to the time function, the processor optimizes the instruction execution by predicting the function's execution path based on observed patterns. As the instructions and data are already cached, and the processor has the results of the prior execution path prediction, the subsequent call executes quickly and predictably relative to the initial call while the processor remains in a working (i.e., non-sleep) state. The series of calls provides a deterministic time computation with improved accuracy by mitigating the unpredictability of processor sleep state delays.
Timer task ownership determination in a cluster based on a common cluster member selection algorithm
Distributed timer task execution management is disclosed. A cluster member generates a first timer task that can be executed on any cluster member of a plurality of cluster members including the first cluster member that composes a cluster. A first timer task schedule that identifies at least one future point in time at which the first timer task is to be executed is generated. A second cluster member of the plurality of cluster members is selected as a cluster member owner for the first timer task that is to schedule the first timer task and to execute the first timer task at the at least one future point in time. The first timer task and the first timer task schedule are transferred to the second cluster member.