Provided are a computer program product, system, and method for invoking Input/Output (I/O) threads on processors to demote tracks from a cache. An Input/Output (I/O) thread, executed by a processor, processes I/O requests directed to tracks in the storage by accessing the tracks in the cache. After processing at least one I/O request, the I/O thread determines whether a number of free cache segments in the cache is below a free cache segment threshold. The I/O thread processes a demote ready list, indicating tracks eligible to demote from the cache, to demote tracks from the cache in response to determining that the number of free cache segments is below the free cache segment threshold. The I/O thread continues to process I/O requests directed to tracks from the storage stored in the cache after processing the demote ready list to demote tracks in the cache.

Provided are a computer program product, system, and method for using an access increment number to control a duration during which tracks remain in cache. Tracks in a storage in the cache are indicated in a cache list. For each of the tracks indicated in the cache list, an access value is updated when one of the tracks is accessed in the cache. An access to a track in the cache indicated in the cache list is received. A determination is made as to whether an access increment number for the accessed track, wherein the access increment number is greater than one. The access value for the accessed track is incremented by the determined access increment number in response to the track being accessed in the cache. The access value for one of the tracks is used to determine whether to initiate to demote the track from the cache.

The described technology is generally directed towards fault tolerant cluster data handling techniques, as well as devices and computer readable media configured to perform the disclosed fault tolerant cluster data handling techniques. Nodes in a computing cluster can be configured to generate wire format resources corresponding to operating system resources. A wire format resource can comprise a cache key and a hint information to locate data, such as a file, corresponding to the operating system resource. The wire format resource can be stored in a resource cache along with a pointer that points to the operating system resource. The wire format resource can also be provided to client devices. Nodes in the computing cluster can be configured to receive and process client instructions that include wire format resources, as well as to use hint information to re-allocate data associated with a wire format resource.

Managed units (MUs) of data can be stored on a memory device according to a slice-based layout. A slice of the slice-based layout can include a plurality of stripes, each of the stripes including respective partitions and respective MUs of data. A subset of the stripes each include a quantity of partitions and a first quantity of MUs of data. Another subset of the stripes each include a lesser quantity of partitions and a lesser quantity of MUs of data.

Systems and methods relate to cost-aware cache management policies. In a cost-aware least recently used (LRU) replacement policy, temporal locality as well as miss cost is taken into account in selecting a cache line for replacement, wherein the miss cost is based on an associated operation type including instruction cache read, data cache read, data cache write, prefetch, and write back. In a cost-aware dynamic re-reference interval prediction (DRRIP) based cache management policy, miss costs associated with operation types pertaining to a cache line are considered for assigning re-reference interval prediction values (RRPV) for inserting the cache line, pursuant to a cache miss and for updating the RRPV upon a hit for the cache line. The operation types comprise instruction cache access, data cache access, prefetch, and write back. These policies improve victim selection, while minimizing cache thrashing and scans.

According to one embodiment, a memory system includes a non-volatile memory array with a plurality of memory cells. Each memory cell is a multilevel cell to which multibit data can be written. The non-volatile memory array includes a first storage region in which the multibit data of a first bit level is written and a second storage region in which data of a second bit level less than the first bit level is written. A memory controller is configured to move pieces of data from the first storage region to the second storage region based on the number of data read requests for the pieces of data received over a period of time or on external information received from a host device that sends read requests.

A technique for controlling acceptance of host application data into a data log in a data storage system includes selectively accepting or refusing newly arriving host data into the data log based on a comparison between an oldest entry in the data log and an age threshold. The age threshold is dynamically updated based on system heuristics. As long as the oldest log entry is younger than the age threshold, the data log continues to accept newly arriving host application data, acknowledging IO requests to host applications as the data specified in those requests is entered into the log. However, when the oldest log entry is older than the age threshold, new log entries are temporarily refused entry into the data log. Instead, newly arriving data are placed in a pending list, where they are kept until the data log is again accepting new log entries.

Indications of a minimum retention time and a maximum retention time in a cache comprising a first type of memory and a second type of memory are received from a host application for a first plurality of tracks, wherein the minimum retention time or the maximum retention time are not indicated for a second plurality of tracks. In response to accessing a track of the first plurality of tracks, the minimum retention time is set for the track for the first type of memory, and the maximum retention time is set for the track for the second type of memory.

A memory page management method is provided. The method includes receiving a state-change notification corresponding to a state-change page, and grouping the state-change page from a list to which the state-change page belongs into a keep list or an adaptive LRU list of an adaptive adjusting list according to the state-change notification; receiving an access command from a CPU to perform an access operation to target page data corresponding to a target page; determining that a cache hit state is a hit state or a miss state according to a target NVM page address corresponding to the target page, and grouping the target page into the adaptive LRU list according to the cache hit state; and searching the adaptive page list according to the target NVM page address to obtain a target DRAM page address to complete the access command corresponding to the target page data.

In an approach to optimizing metadata management to boost overall system performance, a cache for a storage system is initialized. Responsive to receiving a cache hit from a host cache during a host I/O operation, a first metadata of a plurality of metadata is transferred to a storage cache, where the first metadata is associated with a user data from the host I/O operation, and further wherein the first metadata is deleted from the host cache. Responsive to determining that the storage cache is full, a second metadata of the plurality of metadata is destaged from the storage cache, where the second metadata is destaged by moving the second metadata to the host cache, and further wherein the second metadata is deleted from the storage cache.