A supported lightweight content filtering method for a hybrid storage system, the method includes: using an LRU queue and a Hash table to filter content, the access frequency of which is lower than a specified threshold (T), the time complexity being O(1). An LRU queue and a Hash table are used to support a quick content filtering method applicable to a hybrid storage system to filter content, the number of times same is accessed being lower than a specified threshold, and to use scarce storage resources to cache hot content that will be frequently accessed, thus improving a cache hit ratio.

A method for maintaining statistics for data elements in a cache is disclosed. The method maintains a heterogeneous cache comprising a higher performance portion and a lower performance portion. The method maintains, within the lower performance portion, a ghost cache containing statistics for data elements that are currently contained in the heterogeneous cache, and data elements that have been demoted from the heterogeneous cache within a specified time interval. The method maintains updates to the statistics in an update area within the higher performance portion. The method determines whether the updates have reached a specified threshold and, in the event the updates have reached the specified threshold, flushes the updates from the update area to the ghost cache to update the statistics. A corresponding system and computer program product are also disclosed.

A method for retaining data pages in a cache is disclosed. In one embodiment, such a method stores multiple data pages in a cache. The method calculates, for each data page, a cost associated with promoting the data page from persistent storage media to the cache. The cost takes into account any data transformations (decryption, decompression, etc.) that are needed to promote the data page from the persistent storage media to the cache. In certain embodiments, the cost is represented as a score that is assigned to each data page. The method retains each data page in the cache for an amount of time that is related to its cost, such that data pages with a higher cost are retained in the cache longer than data pages with a lower cost. A corresponding apparatus and computer program product are also disclosed.

A data write system includes a main memory, a cache memory, and a core processing circuit. The main memory includes a restricted region and a non-restricted region. The cache memory is coupled to the main memory. The cache memory includes multiple ways. The core processing circuit is coupled to the cache memory and includes a logic circuit. The logic circuit is configured to select one of the ways as a selected way according to an access address of the main memory, the restricted region, and mode setting information, to write data corresponding to the access address into the selected way.

A method and system of translating addresses is disclosed that includes receiving an effective address for translation, providing a processor and a translation buffer where the translation buffer has a plurality of entries, wherein each entry contains a mapping of an effective address directly to a corresponding real address, and information on a corresponding intermediate virtual address. The method and system further include determining whether the translation buffer has an entry matching the effective address, and in response to the translation buffer having an entry with a matching effective address, providing the real address translation from the entry having the matching effective address.

A method, computer program product, and computer system for receiving, by a computing device, new data to write to a leaf. At least two timestamps of the leaf may be examined. It may be determined whether a time interval between the at least two timestamps of the leaf is greater than an age threshold. The new data may be written to a first tier storage device when the time interval between the at least two timestamps of the leaf is less than the age threshold; The new data may be written to a second tier storage device when the time interval between the at least two timestamps of the leaf is greater than the age threshold.

A controller controls an operation of a semiconductor memory device. The controller includes a cache buffer, a request analyzer, and a cache controller. The cache buffer stores multiple cache data. The request analyzer generates request information including information on a size of read data to be read. The cache controller determines an eviction policy of the multiple cache data, based on the size of the read data in the request information.

In exemplary aspects of managing the ejection of entries of a coherence directory cache, the directory cache includes directory cache entries that can store copies of respective directory entries from a coherency directory. Each of the directory cache entries is configured to include state and ownership information of respective memory blocks. Information is stored, which indicates if memory blocks are in an active state within a memory region of a memory. A request is received and includes a memory address of a first memory block. Based on the memory address in the request, a cache hit in the directory cache is detected. The request is determined to be a request to change the state of the first memory block to an invalid state. The ejection of a directory cache entry corresponding to the first memory block is managed based on ejection policy rules.

A memory system includes: a memory device including memory blocks for storing data; and a controller suitable for controlling the memory device to increase a first read count for a logical address in a read command corresponding to a read request received from a host, move first data indicated by the logical address from a first memory block to a second memory block among the memory blocks when the first read count is greater than a first threshold value, increase a second read count of the first memory block, and perform a read reclaim operation on the first memory block when the second read count is greater than a second threshold value.

An information processing device includes: a cache memory; and a processor configured to: manage the number of times of reference to be used for deduplication control of a data block; store, among data blocks in the cache memory, a first management list in which the data block in which writing is requested and the number of times of reference is 1 is managed by a least recently used scheme, and, among the data blocks in the cache memory, a second management list in which the data block in which writing is requested and the number of times of reference is equal to or larger than 2 is managed by the LRU scheme; and in a case where a data block to be written is registered in the first management list when a write request is processed, maintain the data block registered in the first management list over the cache memory.