A method includes: obtaining a first frame synchronization signal, period between a trailing edge of a first pulse and a leading edge of a next first pulse being first time period corresponding to a first integer number of pulses of a first pixel clock signal; generating a synchronization calibration signal, a triggering edge of the second pulse being delayed compared to a trailing edge of a first pulse; generating a second frame synchronization signal, period between a triggering edge of the second pulse and a leading edge of a third pulse being second time period. When ratio of frequency of the second pixel clock signal to frequency of the first pixel clock signal is within threshold range, the second time period corresponds to a second integer number of pulses of the second pixel clock signal. The second integer is integer value of product of the first integer and ratio.

A method includes: obtaining a first frame synchronization signal, period between a trailing edge of a first pulse and a leading edge of a next first pulse being first time period corresponding to a first integer number of pulses of a first pixel clock signal; generating a synchronization calibration signal, a triggering edge of the second pulse being delayed compared to a trailing edge of a first pulse; generating a second frame synchronization signal, period between a triggering edge of the second pulse and a leading edge of a third pulse being second time period. When ratio of frequency of the second pixel clock signal to frequency of the first pixel clock signal is within threshold range, the second time period corresponds to a second integer number of pulses of the second pixel clock signal. The second integer is integer value of product of the first integer and ratio.

A display panel includes: a plurality of display pixel circuits each which includes a plurality of sub-display pixels and at least one anti-view pixel; and a control device electrically connected with the anti-view pixel. The control device is configured for: when the display panel runs in an anti-view mode, performing a sequential driving and a disordered driving on the anti-view pixel, wherein the sequential driving includes driving the anti-view pixels according to a sequence waveform, and the disordered driving includes driving the anti-view pixels corresponding to a disordered signal based on the disordered signal randomly generated.

A display panel includes: a plurality of display pixel circuits each which includes a plurality of sub-display pixels and at least one anti-view pixel; and a control device electrically connected with the anti-view pixel. The control device is configured for: when the display panel runs in an anti-view mode, performing a sequential driving and a disordered driving on the anti-view pixel, wherein the sequential driving includes driving the anti-view pixels according to a sequence waveform, and the disordered driving includes driving the anti-view pixels corresponding to a disordered signal based on the disordered signal randomly generated.