A testing system for semiconductor chips having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. The DUT PCB is quickly and easily removed and replaced by moving the locking posts between an engaged position and a disengaged position. In this way, a single testing system can be used to test a great variety of semiconductor chips thereby reducing capital equipment costs and space needed in cleanrooms.

A method includes measuring a first calibration kit in a wafer to obtain a first performance data. The wafer includes a substrate, and a plurality of dielectric layers over the substrate. The first calibration kit includes a first passive device over the plurality of dielectric layers, wherein substantially no metal feature is disposed in the plurality of dielectric layers and overlapped by the first passive device. The method further includes measuring a second calibration kit in the wafer to obtain a second performance data. The second calibration kit includes a second passive device identical to the first device and over the plurality of dielectric layers, and dummy patterns in the plurality of dielectric layers and overlapped by the second passive device. The first performance data and the second performance data are de-embedded to determine an effect of metal patterns in the plurality of dielectric layers to overlying passive devices.

A test apparatus includes a probe assembly, which includes: a multilayer structure including probe contact pads; an upper guide plate including an array of upper holes therethrough; a lower guide plate including an array of lower holes therethrough; a dielectric spacer plate located between the upper guide plate and the lower guide plate and including an opening; and an array of probes attached to the probe contact pads, vertically extending through the upper guide plate, the lower guide plate, and the dielectric spacer plate. The lower guide plate includes a downward-protruding portion having a first laterally-extending segment having a first width, and further includes a base portion overlying the downward-protruding portion and having a wider second width. The downward-protruding portion can be used to protect the array of probes while probing test pads on a wafer that are exposed between neighboring semiconductor dies.

An adjustable supporting device including a circuit board, a first fixing module, an adjusting module, a second fixing module, and a supporting base is configured to support a test circuit module. The supporting base is positioned in a first opening of the circuit board, a second opening of the first fixing module, and a third opening of the adjusting module and abuts against the second fixing module and a carrier of the test circuit module. The supporting base includes a first portion abutting against the second fixing module, a second portion connected to a third portion, the third portion connected to a fourth portion, and the fourth portion abutting against the carrier. The first portion and the second portion adjust the parallelism between the test circuit module and a semiconductor element through contact, thereby adjusting the horizontal flatness of multiple contact points of the test circuit module.

Provided is a flexible substrate that does not easily break even if force is imparted to a portion thereof, and the like. The flexible substrate comprises one end, another end, and a pattern part 31a3 formed at least between the one end and the other end. The pattern part 31a3 has a first tongue 31a41 formed by notching. The first tongue 31a41 includes a first region A1 which is the tip region of the first tongue 31a41, and a second region A2 which is connected with the first region A1 and which is the base region of the first tongue 31a41. The first tongue 31a41 is electrically connected with another member via the first region A1. The width of the first region A1 of the first tongue 31a41 is wider than the width of the second region A2 of the first tongue 31a41.

A testing device is disclosed. The testing device includes: a testing platform; an electromagnetic relay platform arranged opposite to the testing platform; and a plurality of probe assemblies disposed between the electromagnetic relay platform and the testing platform. Each of the probe assemblies includes an electromagnetic base and a probe mounted in a side of the electromagnetic base away from the electromagnetic relay platform. Each of the electromagnetic bases is attracted together with the electromagnetic relay platform under an electromagnetic attraction force when the electromagnetic relay platform is energized. The above testing device may be used for testing a variety of circuit boards, and has a relatively wide application.

A testing system for electrical interconnects having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. An actuator is also presented that presses the device under test into the electrical interconnect at increments where tests are performed on one, some or all of the contact points of the electrical interconnect. This information is then analyzed and graphed to assist with determine the optimum force and/or height to use during actual use.

A coaxial electrical interconnect is disclosed. The coaxial electrical interconnect can include an inner conductor including an electrically conductive spring probe. The coaxial electrical interconnect can also include an outer conductor including a plurality of electrically conductive spring probes disposed about the inner conductor. Each spring probe can have a barrel and a plunger biased out of the barrel. The plunger can have a first plunger portion external to the barrel and a second plunger portion disposed partially in the barrel. The first and second plunger portions can have different diameters. A barrel of the spring probe of the inner conductor can be located proximate a plunger of at least one of the spring probes of the outer conductor.

A coaxial electrical interconnect is disclosed. The coaxial electrical interconnect can include an inner conductor including an electrically conductive spring probe. The coaxial electrical interconnect can also include an outer conductor including a plurality of electrically conductive spring probes disposed about the inner conductor. Each spring probe can have a barrel and a plunger biased out of the barrel. The plunger can have a first plunger portion external to the barrel and a second plunger portion disposed partially in the barrel. The first and second plunger portions can have different diameters. A barrel of the spring probe of the inner conductor can be located proximate a plunger of at least one of the spring probes of the outer conductor.

A system and method for testing a device under test (DUT) combines measurement data of field components values made at different sampling locations away from the DUT with computer-aided design layout of the DUT. The combined computer-aided design layout of the DUT and the measurement data can then be displayed for analysis.