Embodiments disclosed herein include optical connectors for photonic packages. In an embodiment an optical connector comprises a socket and a ferrule inserted into the socket. In an embodiment, the optical connector further comprises a first row of optical fibers in the ferrule, and a second row of optical fibers in the ferrule over the first row. In an embodiment, the optical connector further comprises a fiber distribution housing where the first row of optical fibers and the second row of optical fibers are spread laterally within the fiber distribution housing.

A groove alignment structure comprises an etch stop material and a substrate over the etch stop material. A set of grooves is along a first direction in a top surface of the substrate, and adhesive material is in a bottom of the set of grooves. Optical fibers are in the set of grooves over the adhesive material and a portion of the optical fibers extends above the substrate. A set of polymer guides is along the first direction on the top surface of the substrate interleaved with the set of grooves.

Embodiments disclosed herein include optical packages. In an embodiment, an optical package comprises a package substrate, a compute die over the package substrate, and an optics die over the package substrate. In an embodiment, the optics die comprises grating couplers. In an embodiment, an optical connector for optically coupling optical fibers to the grating couplers is provided. In an embodiment, the optical connector comprises a fiber array unit (FAU), where the FAU has a turn. In an embodiment, the optical connector further comprises a fiber shuffler, where the fiber shuffler comprises a first V-groove with a first depth and a second V-groove with a second depth that is greater than the first depth. In an embodiment, the optical connector further comprises a ferrule.

An optoelectronic structure includes a substrate, an electronic die and a photonic die. The electronic die is disposed on the substrate and includes a first surface, wherein the first surface is configured to support an optical component. The photonic die is disposed on the first surface of the electronic die and has an active surface toward the first surface of the electronic die and a side surface facing the optical component.

A semiconductor package comprises an interposer and a photonics die. The photonics die has a front side with an on-chip fiber connector and solder bumps, the photonics die over the interposer with the on-chip fiber connector and the solder bumps facing away from the interposer. A patch substrate is mounted on the interposer adjacent to the photonics die. A logic die is mounted on the patch substrate with an overhang past an edge of the patch substrate and the overhang is attached to the solder bumps of the photonics die. An integrated heat spreader (IHS) is over the logic die such that the photonics die does not directly contact the IHS.

An optical module for endoscope includes an optical element, an optical fiber, a ferrule including a first principal surface, a second principal surface, and a side surface, an opening of an insertion hole being present on the first principal surface, the insertion hole having a bottom surface made of a transparent material, the optical fiber being inserted into the insertion hole, the optical element being bonded to the second principal surface, an opening of a groove connected to the insertion hole being present on the first principal surface, the grove having a bottom surface made of the transparent material, and transparent resin disposed in the insertion hole and the groove of the ferrule.

A memory device is described. The memory device comprises a plurality of stacked memory layers, wherein each of the plurality of stacked memory layers comprises a plurality of memory cells. The memory device further comprises an optical die bonded to the plurality of stacked memory layers and in electrical communication with the stacked memory layers through one or more interconnects. The optical die comprises an optical transceiver, and a memory controller configured to control read and/or write operations of the stacked memory layers. The optical die may be positioned at one end of the plurality of stacked memory layers. The one or more interconnects may comprise one or more through silicon vias (TSV). The plurality of memory cells may comprise a plurality of solid state memory cells. The memory devices described herein can enable all-to-all, point-to-multipoint and ring architectures for connecting logic units with memory devices.

A method for forming a silicon photonics interposer having through-silicon vias (TSVs). The method includes forming vias in a front side of a silicon substrate and defining primary structures for forming optical devices in the front side. Additionally, the method includes bonding a first handle wafer to the front side and thinning down the silicon substrate from the back side and forming bumps at the back side to couple with a conductive material in the vias. Furthermore, the method includes bonding a second handle wafer to the back side and debonding the first handle wafer from the front side to form secondary structures based on the primary structures. Moreover, the method includes forming pads at the front side to couple with the bumps at the back side before completing final structures based on the secondary structures and debonding the second handle wafer from the back side.

A method includes forming multiple photonic devices in a semiconductor wafer, forming a v-shaped groove in a first side of the semiconductor wafer, forming an opening extending through the semiconductor wafer, forming multiple conductive features within the opening, wherein the conductive features extend from the first side of the semiconductor wafer to a second side of the semiconductor wafer, forming a polymer material over the v-shaped groove, depositing a molding material within the opening, wherein the multiple conductive features are separated by the molding material, after depositing the molding material, removing the polymer material to expose the v-shaped groove, and placing an optical fiber within the v-shaped groove.

An optical subassembly includes an eyelet including a first through-hole penetrating from a first surface through a second surface; a first lead terminal, which is to be inserted into the first through-hole, and is configured to transmit an electric signal; a dielectric material, which is filled in a space between the first through-hole and the first lead terminal; a device mounting substrate, on which an optical device is to be mounted, and which includes a first conductor pattern configured to transmit the electric signal to the optical device; a metal block having mounted thereon the device mounting substrate; a temperature regulator placed between the metal block and the eyelet; a relay substrate including a second conductor pattern, which is configured to transmit the electric signal to the optical device; a seat, which protrudes from the first surface in a direction extended from the first through-hole, and has a third surface mounting the relay substrate; and a spacer interposed between the third surface and the relay substrate to establish conduction between a rear surface of the relay substrate and the seat.