An FFS mode array substrate and a manufacturing method thereof are provided. The FFS mode array substrate has: a glass substrate provided with a gate electrode thereon; a first insulation layer; a semiconductor layer having a channel region and a common electrode region to form a channel semiconductor layer on the channel region of the semiconductor layer, and form a common electrode layer on the common electrode region of the semiconductor layer by doping semiconductor thereon; and a second insulation layer provided with a first through hole and a second through hole therein.

A thin film transistor substrate includes a gate electrode on a base substrate, an active pattern on the gate electrode, a source electrode on a first end of the active pattern, a drain electrode on a second end of the active pattern, an organic insulation layer on the source electrode and the drain electrode, and a transparent electrode contacting the drain electrode through a contact opening in the organic insulation layer. The drain electrode is spaced from the source electrode. The organic insulation layer includes a first thickness portion around the contact opening and a second thickness portion adjacent to the first thickness portion. The second thickness portion has a thickness greater than that of the first thickness portion.

A TFT array substrate and the manufacturing method are disclosed, one masking process is adopted to etch the first metal oxide semiconductor layer to be the first semiconductor pattern and the second semiconductor pattern. Afterward, a doping process is applied to the first semiconductor pattern and the second semiconductor pattern. Two ends of the first semiconductor pattern are processed to be a first conductor pattern and a second conductor pattern spaced apart from each other. In addition, the second semiconductor pattern is processed to be a common electrode. The remaining first semiconductor pattern is above the bottom gate electrode. In this way, the number of masking processes adopted during the manufacturing process of the array substrate is decreased, such that the manufacturing efficiency is enhanced and the manufacturing cost is reduced.

The disclosure discloses an array substrate, a method for fabricating the same, a liquid crystal display panel, and a display device, where the array substrate includes: a base substrate; a convex component located on the base substrate; a reflection layer overlying the convex component; a thin film transistor located above a film layer at which the reflection layer is located; a pixel electrode located above a film layer at which the thin film transistor is located; and a planarization layer located between the pixel electrode and the reflection layer.

An array substrate, a manufacturing method thereof, and a display device are disclosed. The array substrate includes: a base substrate; a gate line located on the base substrate and extending in a first direction; a data line located on the base substrate and extending in a second direction; the gate line and the data line crossing each other to define an orthographic projection of a pixel region on the base substrate; an organic film located on the gate line and the data line and located in the pixel region; and a pixel electrode located on the organic film in the pixel region. The organic film located directly above the data line has a first thickness, the organic film located directly below the pixel electrode has a second thickness, and the first thickness is greater than the second thickness.

A gate driver on array (GOA) array substrate, a method for fabricating the same, and a display device including the same, which include a GOA driving circuit. The GOA driving circuit includes a plurality of GOA units. Each of the GOA units includes a thin film transistor array layer, a first metal layer, an insulating layer, and a second metal layer. The first metal layer has a patterned signal line at a position crossing the second metal layer. The signal line includes a trunk portion and side walls formed of two opposite sides of the trunk portion. The side walls are shaped as arc-shaped grooves.

Discloses are a display panel, a method of manufacturing the same and a display device. The display panel includes: a first substrate; a second substrate disposed opposite to the first substrate; and a reflective structure group disposed on the first substrate, the reflective structure group includes a plurality of reflective structures in one-to-one correspondence with visual fields of view, and a reflective surface of each reflective structure of the reflective structures faces the second substrate, and the reflective structure is configured to reflect light from the second substrate in a predetermined direction to a corresponding field of view.

A liquid crystal display device includes a transistor, a pixel electrode, and a common electrode. The transistor includes a first gate electrode on a first substrate, a second gate electrode having a region overlapping the first gate electrode, an oxide semiconductor layer between the first gate electrode and the second gate electrode, a first insulating layer between the first gate electrode and the oxide semiconductor layer, a second insulating layer between the oxide semiconductor layer and the second gate electrode, and a first oxide conductive layer and a second oxide conductive layer disposed between the first insulating layer and the oxide semiconductor layer and disposed with the first gate electrode and the second gate electrode sandwiched from both sides. The pixel electrode is disposed between the first and the second insulating layer; the common electrode is disposed a region overlapping with the pixel electrode and on the second insulating layer.

A display device includes a first substrate and a second substrate comprising a color filter film. The first substrate includes a first organic resin layer, a second organic resin layer over the first organic resin layer; and a first opening portion provided by opening the first organic resin layer and the second organic resin layer. The first organic resin layer includes a first opening side surface having a first taper angle greater than 0° and less than 80° in the first opening portion. The second organic resin layer includes a second side surface having a second taper angle greater than 80° and less than 90° in the first opening portion. The first opening side surface is covered with the second organic resin layer.

An array substrate of this disclosure includes: a substrate and a first conductive layer and a second conductive layer sequentially stacked on the substrate; orthographic projections of the first and second conductive layers on the substrate have an overlapping region; portions of the first and second conductive layers in the overlapping region constitute a first conductive pattern; a portion of the first conductive layer outside the overlapping region includes a second conductive pattern and a third conductive pattern; the second and third conductive patterns have an interval therebetween. A first distance between first regions of the second and third conductive patterns proximal to the first conductive pattern is larger than a second distance between second regions of the second and third conductive patterns distal to the first conductive pattern.