An electro-optical device includes a wiring substrate including a wiring line, a common electrode, a conduction member that is electrically conductive, the conduction member being configured to electrically couple the wiring line and the common electrode, a pixel electrode disposed between the wiring substrate and the common electrode, and an electro-optical layer disposed between the pixel electrode and the common electrode. The wiring substrate includes: an insulating layer disposed between the wiring line and the common electrode, a conduction electrode between the insulating layer and the common electrode and in contact with the insulating layer, the conduction member being disposed at the conduction electrode, and a contact portion composed of a material different from the conduction electrode and penetrating the insulating layer, the contact portion being configured to electrically couple the conduction electrode and the wiring line.

Disclosed is a touch sensitive display apparatus which decreases a load of each of a plurality of touch electrodes and reduces a load deviation between the plurality of touch electrodes, thereby enhancing image quality. The touch sensitive display apparatus comprises a touch sensitive panel. The touch panel comprises a plurality of touch electrodes comprising at least a first touch electrode. The first touch electrode comprises a plurality of first touch electrode lines that are parallel to each other. A first touch signal line is connected to the plurality of first touch electrode lines of the first touch electrode, and the first touch electrode is driven for image display and touch sensing via the first touch signal line. A first connecting line is in a different layer than the first touch electrode lines, and the first connecting line is connected to the plurality of first touch electrode lines.

A display device includes a display substrate, a plurality of source drive circuit elements, gate drive circuits, and a plurality of gate connection lines. The plurality of gate connection lines pass through inter-element regions between the source drive circuit elements in plan view, and pass through mounting regions. Gate terminals connected to the gate connection lines are formed at positions facing the inter-element regions in a direction from the inter-element regions toward an FPC (Y2 direction).

A display panel and a manufacturing method thereof are disclosed. The display panel includes a plurality of scan lines parallel to one another, a plurality of data lines parallel to one another, a common electrode, and a plurality of connection lines. The scan lines and the data lines are disposed in different layers and perpendicular to each other. A loop of a second metal layer is disposed in a non-display region in the layer in which the data lines are disposed. A plurality of connection lines are disposed to be parallel to the data lines. A plurality of protrusion structures are disposed on the scan lines at intervals along a first direction.

A display device and a method of fabricating a display device are provided. A display device includes a substrate. The wiring layer includes a conductive metal layer and a metal compound layer of the conductive metal layer, The metal compound layer surrounds the conductive metal layer.

In a liquid crystal device, an intermediate refractive index film including a silicon nitride film, a silicon oxynitride film, or an aluminum oxide film is provided between an oriented film formed of a diagonally vapor-deposited film of silicon oxide and an electrode containing ITO. Thus, because there are no interfaces having a large refractive index difference between the oriented film and the electrode, reflection between the oriented film and the electrode can be suppressed. A high density silicon oxide film is formed between the intermediate refractive index film and the oriented film. The high density silicon oxide film is formed by an atomic deposition method, thus is appropriately formed inside a contact hole.

The present disclosure provides an array substrate, including a display region, and the display region includes driving circuit regions. The array substrate includes a first substrate, a gate driver on array (GOA) circuit and a pixel driving circuit respectively disposed on opposite sides of the first substrate and located in the driving circuit regions. The GOA circuit is connected with the pixel driving circuit through a plurality of via holes, so wiring regions of the GOA circuit and wiring regions of the pixel driving circuit can overlap in space, thereby reducing space occupied by a pixel display region and increasing a pixel aperture ratio.

To minimize the width of a non-light-emitting border region around an opening in the active area, data lines may be stacked in the border region. Data line portions may be formed using three metal layers in three different planes within the border region. A metal layer that forms a positive power signal distribution path in the active area may serve as a data line portion in the border region. A metal layer may be added in the border region to serve as a data line portion in the border region. Data line signals may also be provided to pixels on both sides of an opening in the active area using supplemental data line paths. A supplemental data line path may be routed through the active area of the display to electrically connect data line segments on opposing sides of an opening within the display.

An array substrate includes: a first substrate (10), including a plurality of sub-pixel regions (101) arranged in an array along a row direction (X) and a column direction (Y); a pixel circuit layer, including a plurality of sub-pixel circuits; a planarization layer (17), provided with a first via hole (170) located in the sub-pixel regions (101), and includes at least one pattern portion (171), the pattern portion (171) includes a plurality of pattern units (171a) arranged in an array along the row direction (X) and the column direction (Y); and a reflective electrode layer, wherein the reflective electrode layer includes a plurality of reflective electrodes (18) that are mutually disconnected, each of the reflective electrodes (18) is located in one of the sub-pixel regions (101) and is electrically connected to the sub-pixel circuit through the first via hole (170).

In various embodiments, an apparatus comprises a composite backplane that modulates light from a light source, where the composite backplane comprises an electronics layer disposed on a substrate, a photonics integrated circuit (IC) layer disposed on the electronics layer that causes light from the light source to propagate in a first direction, and an active light modulation (ALM) interface layer disposed on the photonics IC layer controls an ALM interface layer in order to control the light propagating in the first direction.