Disclosed are an array substrate, a method for fabricating the same, a display panel, and a display device, and the array substrate includes: an underlying substrate, and gate lines and data lines located on the underlying substrate, and intersecting with each other, a layer where the gate lines are located is between a layer where the data lines are located, and the underlying substrate; and the array substrate further includes a buffer layer located between the underlying substrate and the layer where the gate lines are located; and the buffer layer includes a plurality of through-holes, where orthographical projections of the through-holes onto the underlying substrate cover orthographical projections of the areas where the gate lines intersect with the data lines, onto the underlying substrate.

It is an object of the present disclosure to dispose an optical element on a lower surface side of transistors without being influenced by heat treatment in a transistor forming process such that peeling, displacement, and the like do not easily occur. A transistor array substrate includes: a first substrate (110) including transistors (113) arranged in an array; and a second substrate (120) including an optical element (122), in which the transistors are arranged on a front surface side of the first substrate, and the second substrate is bonded to a back surface of the first substrate by plasma bonding treatment.

A display substrate has a display area and a peripheral area. The display substrate includes a base, a first insulating layer disposed above the base, a first alignment pattern disposed in the peripheral area on a surface of the first insulating layer facing away from the base, and a second alignment pattern disposed in the peripheral area at a side of the first insulating layer away from the base. An orthographic projection of the second alignment pattern on the base and an orthographic projection of the first alignment pattern on the base have a non-overlapping region therebetween, and the second alignment pattern is in contact with the first insulating layer in the non-overlapping region. Adhesion between the second alignment pattern and the first insulating layer is greater than adhesion between the second alignment pattern and the first alignment pattern.

A display substrate is provided, including: a base (1); and a plurality of pixel units (10) located on the base (1) and arranged in an array, where the display substrate further includes a plurality of data lines (25), and for each of the plurality of data lines (25), the data line (25) extends along a column direction and is located between adjacent first pixel unit (10A) and second pixel unit (10B) in a row direction, the data line (25) is arranged in a different layer from a first pixel electrode (40A) of the first pixel unit (10A) and a second pixel electrode (40B) of the second pixel unit (10B), and the data line (25) includes a first branch line (252) and a second branch line (253) that are connected in parallel and extend in the column direction; an orthographic projection of the first branch line (252) on the base (1) at least partially overlaps with an orthographic projection of the first pixel electrode (40A) on the base (1); an orthographic projection of the second branch line (253) on the base (1) at least partially overlaps with an orthographic projection of the second pixel electrode (40B) on the base (1). A display panel and a method of manufacturing a display substrate are further provided.

A liquid crystal display device having an outer shape of a display region formed other than a rectangle. A driver for supplying a video signal is disposed outside the display region. A selector with selector TFT is disposed between the display region and the driver. A video signal line is disposed between the driver and the selector, and a drain line is disposed between the selector and the display region. A scanning circuit for supplying a scanning signal to the scanning line is disposed outside the display region. The selector is disposed between the scanning line and the display region, and covered with ITO as the common electrode. The common bus wiring is disposed outside the selector.

The disclosure relates to an array substrate. The array substrate may include a base substrate, an auxiliary electrode, a thin film transistor, a first insulating layer, a first electrode, a second insulating layer, and a second electrode sequentially arranged in a direction away from the base substrate. The auxiliary electrode is between the first insulating layer and the second insulating layer and insulated from the first electrode, the auxiliary electrode is coupled to a drain of the thin film transistor through a first via hole in the first insulating layer, and the second electrode is coupled to the auxiliary electrode through a second via hole in the second insulating layer.

The present invention relates to a liquid crystal display panel having a predetermined size, containing a wiring film formed of a metal, an insulating film containing an inorganic substance and a substrate formed of a non-alkali glass, in which the metal has the product of a Young's modulus (E) and a thermal expansion coefficient (α) at room temperature falling within a predetermined range, α of the inorganic substance is smaller than that of the non-alkali glass, the non-alkali glass has E of from 70 GPa to 95 GPa and α of from 32×10.sup.−7 to 45×10.sup.−7 (1/° C.) in which E and α satisfies a predetermined formula, and has a predetermined composition.

An array substrate includes a gate layer, a first insulating layer, a channel layer, a source-drain layer, a second insulating layer, and a common electrode layer that are sequentially stacked, wherein the second insulating lay is provided with via holes formed therein; and the source-drain layer includes a plurality of sources, a plurality of drains, a plurality of data lines and a plurality of common electrode signal lines. The common electrode signal line includes a plurality of common electrode signal line segments, each of the common electrode signal line segments passes through at least one sub-pixel row, and each of the common electrode signal line segments is connected to the common electrode layer through the via hole.

A liquid crystal display device having an outer shape of a display region formed other than a rectangle. A driver for supplying a video signal is disposed outside the display region. A selector with selector TFT is disposed between the display region and the driver. A video signal line is disposed between the driver and the selector, and a drain line is disposed between the selector and the display region. A scanning circuit for supplying a scanning signal to the scanning line is disposed outside the display region. The selector is disposed between the scanning line and the display region, and covered with ITO as the common electrode. The common bus wiring is disposed outside the selector.

A display device includes a liquid crystal layer between a first substrate and a second substrate. The first substrate includes a wiring line and a pixel electrode. The liquid crystal layer includes a stripe-shaped polymer extending in a first direction and a liquid crystal molecule. The liquid crystal layer includes a first polymer in an area overlapping the wiring line and a second polymer in an area overlapping the pixel electrode. The first polymer includes a first portion extending in a direction different from the first direction. The second polymer includes a second portion extending in a direction different from the first direction. A density of the first portion is higher than a density of the second portion.