The liquid crystal display device includes: a display region for displaying an image; and a frame region surrounding the display region, the liquid crystal display device sequentially including from a viewing surface side toward a back surface side: a first polarizing plate; a first substrate provided with a switching element connected to a gate line and a source line; a liquid crystal layer; a second substrate; and a second polarizing plate, in the frame region, the first substrate sequentially including from a viewing surface side toward a back surface side a support substrate, a reflectance-reducing layer, and a metal line layer that overlaps the reflectance-reducing layer and includes at least one of a gate line layer provided with the gate line or a source line layer provided with the source line, the reflectance-reducing layer having a lower viewing surface side reflectance than the metal line layer.

The present disclosure provides an array substrate, including a substrate, a first functional layer configured on one side of the substrate, a first insulating layer configured on the first functional layer facing away from the substrate, a second functional layer configured on the first insulating layer facing away from the substrate, a second insulating layer configured on the second functional layer facing away from the substrate, a third functional layer configured on the second insulating layer facing away from the substrate, a third insulating layer configured on the third functional layer facing away from the substrate, a fourth functional layer configured on the third insulating layer facing away from the substrate, and a plurality of through-holes configured to electrically connect different functional layers, wherein the depth of any through-holes does not exceed the thickness of two adjacent insulating layers.

According to one embodiment, a display device includes a first substrate and a second substrate opposed to the first substrate. The first substrate includes an insulating substrate, a switching element located on the insulating substrate and having a relay electrode, an organic insulating film covering the switching element and having a first through-hole penetrating to the relay electrode, a pixel electrode being in contact with the relay electrode via the first through-hole, a first capacitance insulating film covering the pixel electrode, a filler having an insulation property filled in at least the first through-hole and located on the pixel electrode and the first capacitance insulating film, and a common electrode covering the filler.

A metal oxide thin film according to the present invention has a peak which is attributed to 1s electrons of nitrogen in a binding energy range of 402 eV to 405 eV in an XPS spectrum obtained by X-ray photoelectron spectroscopy, in which peak areas, which are obtained by separation of peaks having a peak energy of a metal-oxygen bond attributed to 1s electrons of oxygen, satisfy the following expression.
0.9<D/E  (1)
(D represents a peak area of a component having a peak position in a binding energy range of 529 eV or higher and lower than 531 eV, and E represents a peak area of a component having a peak position in a binding energy range of 531 eV to 532 eV.)

An array substrate is provided, including a first base substrate, gate lines, common electrodes, and pixel electrodes. The gate lines are disposed on the first base substrate and extend in a first direction. The common electrodes and the pixel electrodes are disposed at a side of the gate lines away from the first base substrate. The pixel electrodes are arranged in an array and into rows of pixel electrodes extending in the first direction. At least one pixel electrode in each row of pixel electrodes includes two pixel sub-electrodes arranged in a second direction intersecting the first direction, at least one gate line is disposed between the two pixel sub-electrodes, and the two pixel sub-electrodes are coupled to a gate line in the at least one gate line. Each electrode in at least electrodes, farther away from the first base substrate, in the common electrodes and the pixel electrodes has slits.

Embodiments of the present disclosure disclose an array substrate, a liquid crystal display panel and a display device. The array substrate comprises a base substrate and a thin film transistor provided on the base substrate, and the thin film transistor comprises a gate electrode, an active layer, a source electrode and a drain electrode. The array substrate further comprises: a common electrode provided above the thin film transistor, and a first pixel electrode and a second pixel electrode both electrically connected with the drain electrode of the thin film transistor. The first pixel electrode is provided below the common electrode and is insulated from the common electrode, and the second pixel electrode is provided above the common electrode and is insulated from the common electrode.

The present invention provides a thin film transistor and a method of fabricating the same, an array substrate and a method of fabricating the same, and a display device. The thin film transistor comprises a gate, a source, a drain, a gate insulation layer, an active layer, a passivation layer, a first electrode connection line and a second electrode connection line. The gate, the source and the drain are provided in the same layer and comprise the same material. The gate insulation layer is provided above the gate, the active layer is provided above the gate insulation layer, and a pattern of the gate insulation layer, a pattern of the gate and a pattern of the active layer coincide with each other. The passivation layer covers the source, the drain and the active layer, and the passivation layer has a first via hole corresponding to a position of the source, a second via hole corresponding to a position of the drain, and a third via hole and a fourth via hole corresponding to a position of the active layer provided therein. The first electrode connection line connects the source with the active layer through the first via hole and the third via hole, and the second electrode connection line connects the drain with the active layer through the second via hole and the fourth via hole.

A display device includes: a substrate including first and second light-blocking areas, and a pixel area; a light-blocking pattern at least partially at the first light-blocking area; a data line at the second light-blocking area; a first insulating layer on the light-blocking pattern and the data line; a semiconductor layer on the first insulating layer and overlapping the light-blocking pattern on a plane; a second insulating layer on the semiconductor layer; a color filter on the second insulating layer at least partially at the pixel area; a third insulating layer on the second insulating layer and the color filter; a gate line on the third insulating layer at the first light-blocking area; a pixel electrode at least partially at the pixel area; and a bridge electrode at least partially at the first light-blocking area. The second and third insulating layers directly contact one another over the semiconductor layer.

An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

The present invention provides a thin film transistor array substrate and a liquid crystal display panel. The thin film transistor array substrate comprises: a substrate; a light shielding layer, located at a middle part on a surface of the substrate; a buffer layer, covering the light shielding layer; a Low Temperature Poly-silicon layer, being located on the buffer layer, and corresponding to the light shielding layer; an isolation layer, covering the Low Temperature Poly-silicon layer, and the isolation layer comprises a through hole, wherein a width of the through hole is smaller than a width of the light shielding layer; a metal layer, located on the isolation layer, and the metal layer is connected with the Low Temperature Poly-silicon layer via the through hole. The thin film transistor array substrate and the liquid crystal display panel have a higher aperture ratio.