Disclosed is an image sensing device including a current supply circuit coupled between a supply terminal of a first voltage and a pair of output terminals, an input circuit coupled between the pair of output terminals and a common node, and suitable for receiving a pixel signal and a ramp signal, and a mirroring circuit coupled between the common node and a supply terminal of a second voltage, and suitable for compensating for an operating current, which flows between the common node and the supply terminal of the second voltage, based on a reference current when generating the operating current by mirroring the reference current.

An on-chip resistor correction circuit includes a first MOS transistor connected between VDD and a reference resistor, the other end of the reference resistor being grounded; an operational amplifier for outputting a first control signal based on a reference voltage and a voltage of the reference resistor; a second MOS transistor connected between VDD and a reference node; a branch where each of the on-chip resistors is located is controllably connected between the reference node and ground; a comparator for generating a comparison signal based on the voltage of the reference node and the reference voltage; and a controller for generating a control signal under the action of the comparison signal to control the branch where each of the on-chip resistors is located to turn on or off.

A circuit includes a current mirror stage with a switch, that when made conductive, provides current between the input and the output of the current mirror stage through the switch. When the switch is nonconductive, current is not provided through the switch. The stage includes current mirror circuitry, that when the switch is nonconductive, provides current at the output that is mirrored from current provided to the input of the current mirror stage.

A bandgap circuit includes a supply node as well as a first and second bipolar transistors having jointly coupled base terminal at a bandgap node providing a bandgap voltage. First and second current generators are coupled to the supply node and supply mirrored first and second currents, respectively, to first and second circuit nodes. A third circuit node is coupled to the first bipolar transistor via a first resistor and coupled to ground via a second resistor, respectively. The third circuit node is also coupled to the second bipolar transistor so that the second resistor is traversed by a current which is the sum of the currents through the bipolar transistors. A decoupling stage intermediate the current generators and the bipolar transistors includes first and second cascode decoupling transistors having jointly coupled control terminals receiving a bias voltage sensitive to the bandgap voltage.

A method and an integrated circuit for limiting a switchable load current. The integrated circuit includes a main transistor, through which in the conductive state a load current flows for supplying a load and a mirror transistor, a gate terminal of the mirror transistor being electrically connected to a gate terminal of the main transistor and a source terminal of the mirror transistor being electrically connected to a source terminal of the main transistor. The integrated circuit further includes a coupling circuit, which is configured to track a source drain voltage of the mirror transistor as a function of the source drain voltage of the main transistor. A gate control circuit is further provided, which limits the load current through the main transistor on the basis of a drain current through the mirror transistor.

Techniques for controlling a low-dropout (LDO) voltage regulator. In an example, an LDO voltage regulator circuit includes an amplifier having an output coupled to a transistor. First and second inputs of the amplifier are coupled to a power supply node via first and second resistors, respectively. The transistor gate is coupled to the amplifier output, the transistor source is coupled to the second input of the amplifier, and the transistor drain is coupled to a reference voltage node. The second resistor is variable based on the amplifier output and a reference voltage from the reference voltage node. In an example, the reference voltage node is connectable to ground via a reference resistor connected in parallel with a noise-filtering capacitor, which causes a reference current to flow through the transistor. The reference current is adjusted based on the drain-to-source voltage of the transistor.

Aspects of the disclosure include a device comprising an energy storage device configured to provide first power having a first voltage level, a voltage regulator coupled to the energy storage device and configured to receive the first power and regulate the first power to generate regulated power having a set output regulated voltage level, and bias circuitry coupled to the voltage regulator and including an output branch to output a bias current, and a feedback branch to control the bias current, the feedback branch including a bias-boosting component configured to be in an active mode responsive to the first voltage level being below the set output regulated voltage level and to be in an inactive mode responsive to the first voltage level being at or above the set output regulated voltage level.

In described examples, a circuit includes a current mirror circuit. A first stage is coupled to the current mirror circuit. A second stage is coupled to the current mirror circuit and to the first stage. A voltage divider network is coupled to the second stage. The circuit includes an output transistor having first and second terminals, in which the first terminal of the output transistor is coupled to the first stage, and the second terminal of the output transistor is coupled to the voltage divider network.

In described examples, a circuit includes a current mirror circuit. A first stage is coupled to the current mirror circuit. A second stage is coupled to the current mirror circuit and to the first stage. An output transistor is coupled to the first stage and to the current mirror circuit. A voltage divider network is coupled to the output transistor, and a power source is coupled to the second stage and to the voltage divider network

Circuit embodiments for a switched-capacitor power converter, and/or methods of operation of such a converter, that robustly deal with various startup scenarios, are efficient and low cost, and have quick startup times to steady-state converter operation. Embodiments prevent full charge pump capacitor discharge during shutdown of a converter and/or rebalance charge pump capacitors during a startup period before switching operation by discharging and/or precharging the charge pump capacitors. Embodiments may include a dedicated rebalancer circuit that includes a voltage sensing circuit coupled to an output voltage of a converter, and a balance circuit configured to charge or discharge each charge pump capacitor towards a target steady-state multiple of the output voltage of the converter as a function of an output signal from the voltage sensing circuit indicative of the output voltage. Embodiments prevent or limit current in-rush to a converter during a startup state.