A circuit for controlling a collector current of a substrate bipolar junction transistor (BJT) is provided. The circuit includes a first current mirror configured to generate a first mirroring base current corresponding to a replicate current of a base current of the substrate BJT, a current transmitter configured to transmit the first mirroring base current, a second current mirror configured to generate a second mirroring base current corresponding to a replicate current of the first mirroring base current received from the current transmitter and configured to supply the second mirroring base current to an emitter of the substrate BJT, and a current source configured to supply a drive current corresponding to a collector current of the substrate BJT to the emitter of the substrate BJT.

A circuit for biasing non-volatile memory cells includes a dummy decoding path between a global bias line and a biasing node, a reference current generator coupled to the dummy decoding path and configured to supply a reference current, a biasing stage configured to set a cell bias voltage on the biasing node, and a compensation stage configured to compensate a current absorption of the biasing stage at the biasing node so that the reference current will flow through the dummy decoding path.

An apparatus and method for generating a temperature-compensated reference voltage are disclosed. The apparatus generates substantially equal temperature-compensated currents by controlling (through negative feedback) voltages across separate resistors through which the currents flow, respectively. Two of the temperature-compensated currents are formed by combining (e.g., summing) a complementary to absolute temperature (CTAT) current (I.sub.CTAT) and a proportional to absolute temperature (PTAT) current (I.sub.PTAT). A reference voltage V.sub.REF is produced by configuring the other the temperature-compensated current to flow through an output resistor.

A current generation circuit including a first and a second bipolar transistors, a current distribution circuit that makes a first current and a second current flow through the first and second bipolar transistors, respectively, the first current and the second current corresponding to a first control voltage, a first NMOS transistor disposed between the first bipolar transistor and the first current distribution circuit, a second NMOS transistor disposed between the second bipolar transistor and the first current distribution circuit, a first resistive element, a first operational amplifier that outputs the second control voltage to the gates of the first and the second NMOS transistors according to a drain voltage of the first NMOS transistor and a reference bias voltage, and a second operational amplifier that generates the first control voltage according to a drain voltage of the second NMOS transistor and the reference bias voltage.

A CMOS voltage reference is disclosed. The CMOS voltage reference may include a PTAT current bias circuit including a start-up circuit, a core module implementing high order non-linear curvature compensation and an output stage supplying the reference voltage. The CMOS voltage reference may include a PTAT current bias circuit having a start-up and a CTAT feedback loop and a PTAT feedback loop and a compensating circuit summing the current from the CTAT feedback loop and the PTAT feedback loop.

In some embodiments, a circuit includes a first transistor, a second transistor, a resistive device and an amplifier. The first transistor includes a first drain and a first gate. The second transistor includes a second drain and a second gate. The resistive device is coupled between the first gate and the second gate. The amplifier includes a first input coupled to the first drain and a second input coupled to the second drain. The amplifier is configured to keep a voltage level at the first drain and that at the second drain equal to each other.

A circuit for controlling a collector current of a substrate bipolar junction transistor (BJT) is provided. The circuit includes a first current mirror configured to generate a first mirroring base current corresponding to a replicate current of a base current of the substrate BJT, a current transmitter configured to transmit the first mirroring base current, a second current mirror configured to generate a second mirroring base current corresponding to a replicate current of the first mirroring base current received from the current transmitter and configured to supply the second mirroring base current to an emitter of the substrate BJT, and a current source configured to supply a drive current corresponding to a collector current of the substrate BJT to the emitter of the substrate BJT.

Subsystems and methods disclosed herein provide a reference signal to a power amplifier (PA) of an RF transmitter or transceiver. PTAT and CTAT signals and a temperature indication signal are produced. Based on the temperature indication signal, one of the PTAT or CTAT signals is selected to be used to produce one or more DAC reference signals. Using the selected one of the PTAT or CTAT signals, the one or more DAC reference signals are produced and used to bias the DAC. A multi-bit digital input signal is converted to an analog output signal using the DAC that is biased using the one or more DAC reference signals (produced using the selected one of the PTAT or CTAT signals). Further, the analog signal output by the DAC, or an amplified version thereof, is used as the reference signal that is provided to the PA of the RF transmitter or transceiver.

A variable voltage generation circuit includes a first amplification circuit and a second amplification circuit. The first amplification circuit generates a first output voltage based on a reference voltage, a first feedback voltage, a temperature-varied voltage and a temperature-fixed voltage such that the first output voltage is varied in a first voltage range according to a variation of the operational temperature. The first amplification circuit generates the first feedback voltage based on the first output voltage. The second amplification circuit generates a second output voltage based on the first feedback voltage, a second feedback voltage, the temperature-varied voltage and the temperature-fixed voltage such that the second output voltage is varied in a second voltage range wider than the first voltage range according to the variation of the operational temperature. The second amplification circuit generates the second feedback voltage based on the second output voltage.

A circuit for biasing non-volatile memory cells includes a dummy decoding path between a global bias line and a biasing node, a reference current generator coupled to the dummy decoding path and configured to supply a reference current, a biasing stage configured to set a cell bias voltage on the biasing node, and a compensation stage configured to compensate a current absorption of the biasing stage at the biasing node so that the reference current will flow through the dummy decoding path.