A power amplifier configured to amplify a received input signal, and the power amplifier includes a bias circuit and an output stage circuit. The bias circuit includes a reference voltage circuit and a bias generating circuit. The reference voltage circuit receives the first system voltage and provides a reference voltage according to a first system voltage, and the reference voltage changes as the temperature of the wafer changes. The bias generating circuit receives the second system voltage and the reference voltage, and generates an operating voltage. The output stage circuit is coupled to the bias circuit to receive the operating voltage and the driving current to receive and amplify the input signal. When a chip temperature is changed, the bias generating circuit changes the operating voltage according to the reference voltage, such that the driving current approaches a predetermined value as the chip temperature rises.

A current reference circuit includes a native metal oxide semiconductor field effect transistor (MOSFET). The native MOSFET includes a source terminal coupled to ground. The current reference circuit also includes a transistor and an amplifier circuit. The transistor includes a first terminal coupled to a drain terminal of the native MOSFET, a second terminal coupled to a power supply rail, and a third terminal coupled to the drain terminal of the native MOSFET. The amplifier circuit includes an input terminal coupled to the drain terminal of the native MOSFET, and an output terminal coupled to a gate terminal of the native MOSFET.

Circuits, systems, and methods to automatically switch modes to provide constant reference voltages are discussed herein. For example, a bandgap reference system may include a first bandgap reference circuit configured to provide a first bandgap reference voltage, a low dropout regulator coupled to the first bandgap reference circuit, a temperature circuit coupled to the low dropout regulator, and a second bandgap reference circuit coupled to the low dropout regulator and the temperature circuit. The second bandgap reference circuit may be configured to configure one or more impedance elements based at least in part on a temperature signal and provide a second bandgap reference voltage based on one or more currents that pass through the one or more impedance elements.

Trimming components within an oscillator comprising: a trim-capable current source, wherein the trim-capable current source comprises a trimmable resistor and a trimmable current component, a comparator comprising a first input terminal that couples to the trim-capable current source and the second input terminal that couples to a reference voltage source, a switch coupled to the first input terminal and the trim-capable current source, and a trim-capable capacitor coupled to the switch, wherein the switch is coupled between the trim-capable capacitor and the trim-capable current source.

An electronic device includes a module that delivers a positive temperature coefficient output voltage at an output terminal. A thermistor includes a first MOS transistor operating in weak inversion mode and having a negative temperature coefficient drain-source resistance and whose source is coupled to the output terminal. A current source coupled to the output terminal imposes the drain-source current of the first transistor.

A power amplifier configured to amplify a received input signal, and the power amplifier includes a bias circuit and an output stage circuit. The bias circuit includes a reference voltage circuit and a bias generating circuit. The reference voltage circuit receives the first system voltage and provides a reference voltage according to a first system voltage, and the reference voltage changes as the temperature of the wafer changes. The bias generating circuit receives the second system voltage and the reference voltage, and generates an operating voltage. The output stage circuit is coupled to the bias circuit to receive the operating voltage and the driving current to receive and amplify the input signal. When a chip temperature is changed, the bias generating circuit changes the operating voltage according to the reference voltage, such that the driving current approaches a predetermined value as the chip temperature rises.

An electronic device includes a module that delivers a positive temperature coefficient output voltage at an output terminal. A thermistor includes a first MOS transistor operating in weak inversion mode and having a negative temperature coefficient drain-source resistance and whose source is coupled to the output terminal. A current source coupled to the output terminal operates to impose the drain-source current of the first transistor.

Embodiments of the disclosure are drawn to voltage reference circuits and methods of designing same. The voltage reference circuit may include a main stage and one or more auxiliary stages. The output of the main stage may be a reference voltage. The auxiliary stages may provide a feedback voltage that reduces a temperature dependence of the reference voltage. Each stage may include two or more transistors. The transistors may operate in a sub-threshold mode to provide the reference voltage.

Embodiments of the disclosure are drawn to a low-voltage temperature sensor. The temperature sensor may include a waveform generator, a complementary-to-absolute-temperature (CTAT) voltage generator, a voltage reference, two comparators, and digital logic. A waveform of the waveform generator may be compared to both the CTAT voltage and the voltage reference. The output of the comparison of the CTAT and the waveform may be a pulse-width modulated signal that is temperature-dependent. The output of the comparison of the voltage reference and the waveform may be a signal with constant pulse width. The digital logic may receive the pulsed signals and take a ratio of the two signals to determine a temperature.

A power supply system for USB Power Delivery includes a current source drive circuit to control a power FET to regulate the supply of power along a power path. The current source drive circuit includes a cascode current source and a cascode protection circuit formed by a source follower and a feedback voltage divider. The source follower can be a transistor with its gate connected to a cascode node between upper- and lower-stage transistors of the cascode current source. The divider node of the voltage divider is connected to the gate of the lower-stage transistor. The current source drive circuit can operate within the gate-source voltage specifications of 30-volt DEPMOS devices, and can provide high output impedance to the gate of power FET and a current limit circuit during current limiting operation, without requiring an extra high-voltage mask during fabrication.