Provided are a light deflector and a light output device including the light deflector, the light deflector including a first electrode layer and a second electrode layer that are spaced apart from each other and facing each other, and a deflection layer configured to deflect incident light thereon based on a voltage applied to the first electrode layer and the second electrode layer, wherein the first electrode layer includes a plurality of electrode elements that are spaced apart from each other, and a resistor that is in contact with at least part of the plurality of electrode elements and in which a voltage drop is generated.

An electronic device (10) includes: a power supply (11); a first switch (12) that is connected at least to one pole of the power supply (11) and interrupts power supplied from the power supply (11) to a load (13); a second switch (14) that is positioned on a load (13) side with reference to the first switch (12) and interrupts power supplied from the power supply (11) to the load (13); a first power line (L11) that is connected to one end portion of an electric contact of the second switch (14), the one end portion being located on a first-switch (12) side; a second power line (L12) that is connected to another end portion of the electric contact of the second switch (14); a third power line (L13) that is connected to another pole of the power supply (11); and an electric element (resistor 15) that is connected between the first and second power lines (L11, L12) in parallel to the electric contact or connected between the first and third power lines (L11, L13), such that the electric contact of the second switch (14) is not charged when the first and second switches (12, 14) interrupt power.

Provided are embodiments for a resistor array. The resistor array includes a plurality of resistor elements, where the plurality of resistor elements includes a redundancy region for a most significant bit of an expected value. The resistor array also includes one or more switches coupled to the plurality of resistor elements, and a first terminal and a second terminal coupled to the plurality of resistor elements. Also provided are embodiments for trimming the resistor array where the resistor array includes a redundancy region for a most significant bit for an expected value.

Provided are embodiments for a resistor array. The resistor array includes a plurality of resistor elements, where the plurality of resistor elements includes a redundancy region for a most significant bit of an expected value. The resistor array also includes one or more switches coupled to the plurality of resistor elements, and a first terminal and a second terminal coupled to the plurality of resistor elements. Also provided are embodiments for trimming the resistor array where the resistor array includes a redundancy region for a most significant bit for an expected value.

A strain gauge includes a flexible substrate; and resistors each formed of a Cr composite film. The resistors include a first resistor and a second resistor that are formed on one side of the substrate, and include a third resistor and a fourth resistor that are formed on another side of the substrate. The first resistor, the second resistor, the third resistor, and the fourth resistor constitute a Wheatstone bridge circuit.

Provided are a light deflector and a light output device including the light deflector, the light deflector including a first electrode layer and a second electrode layer that are spaced apart from each other and facing each other, and a deflection layer configured to deflect incident light thereon based on a voltage applied to the first electrode layer and the second electrode layer, wherein the first electrode layer includes a plurality of electrode elements that are spaced apart from each other, and a resistor that is in contact with at least part of the plurality of electrode elements and in which a voltage drop is generated.

Techniques for improving current sensing via a shunt resistance are provided. In an example, an apparatus for sensing current can include a substrate, and a plurality of metal layers stacked on the substrate and separated from the substrate and from each other by an insulation material. In certain examples, a first one or more metal layers can form a sense resistance configured to pass current between a source and a load, and a second one or more metal layers can form one or more gain resistances coupled to the sense resistance and configured to couple to a current sense amplifier. In some example, a metal layer can include portions of both the sense resistance and the gain resistance to compensate for environmental anomalies, material anomalies or manufacturing anomalies.

In an embodiment a multilayer varistor includes a ceramic body made from a varistor material, wherein the ceramic body includes a plurality of inner electrodes, first regions and second regions, wherein the varistor material in the first regions has a first average grain size D.sub.A, wherein the varistor material in the second regions has a second average grain size D.sub.B, and wherein D.sub.A<D.sub.B.

In an embodiment a multilayer varistor includes a ceramic body made from a varistor material, wherein the ceramic body includes a plurality of inner electrodes, first regions and second regions, wherein the varistor material in the first regions has a first average grain size D.sub.A, wherein the varistor material in the second regions has a second average grain size D.sub.B, and wherein D.sub.A<D.sub.B.

An apparatus including a dielectric layer; and a set of thin-film resistors arranged in a row extending in a first direction on the dielectric layer, wherein lengths of the set of thin-film resistors in a second direction substantially orthogonal to the first direction are substantially the same, wherein the set of thin-film resistors includes a first subset of one or more thin-film resistors with respective terminals spaced apart by a first distance, and wherein the set of thin-film resistors includes a second subset of one or more thin-film resistors with respective terminals spaced apart by a second distance, the first distance being different than the second distance.