The present invention discloses a resistor circuit with temperature coefficient compensation, which comprises a first series resistor composed of a first resistor and a second resistor interconnected in series, and a second parallel resistor composed of a third resistor and a fourth resistor interconnected in series, with the first series resistor and the second parallel resistor interconnected in series, wherein the first resistor and the second resistor respectively have a positive and negative temperature coefficient and make the positive and negative temperature coefficients of the first series resistor offset each other, and the third resistor and the fourth resistor respectively have a positive and negative temperature coefficient and make the positive and negative temperature coefficients of the second parallel resistor offset each other.

A damascene method for manufacturing a thin film resistor (TFR) module is provided. A pair of heads are formed spaced apart from each other. A dielectric region is deposited over the pair of heads, and an opening extending over both heads is formed in the dielectric region. A TFR layer is deposited over the dielectric region and extending into the opening to define a cup-shaped TFR layer structure including (a) a laterally-extending TFR element base conductively connected to both heads and (b) vertical ridges extending upwardly from the laterally-extending TFR element base. A high density plasma (HDP) ridge removal process is performed to remove or shorten the vertical ridges from the cup-shaped TFR layer structure, thereby defining a TFR element having removed or shorted vertical ridges. The removal or shortening of the vertical ridges may improve the temperature coefficient of resistance (TCR) characteristic of the TFR element.

In some examples, a touch screen includes resistors between the touch electrodes and routing traces. In some examples, the resistors can include a transparent conductive material included in the touch electrodes of the touch screen. The resistors can be located in a border region of the touch screen that can surround an active area of the touch screen that can include the touch electrodes and display pixels of the touch screen, for example. In some examples, the resistors included in the touch screen can have different resistances from each other and the same outer dimensions as one another. The resistors can reduce the variation in resistance from channel to channel in the touch screen, which can improve touch screen performance, for example.

An all-printed physically unclonable function based on a single-walled carbon nanotube network. The network may be a mixture of semiconducting and metallic nanotubes randomly tangled with each other through the printing process. The unique distribution of carbon nanotubes in a network can be used for authentication, and this feature can be a secret key for a high level hardware security. The carbon nanotube network does not require any advanced purification process, alignment of nanotubes, high-resolution lithography and patterning. Rather, the intrinsic randomness of carbon nanotubes is leveraged to provide the unclonable aspect.

An all-printed physically unclonable function based on a single-walled carbon nanotube network. The network may be a mixture of semiconducting and metallic nanotubes randomly tangled with each other through the printing process. The unique distribution of carbon nanotubes in a network can be used for authentication, and this feature can be a secret key for a high level hardware security. The carbon nanotube network does not require any advanced purification process, alignment of nanotubes, high-resolution lithography and patterning. Rather, the intrinsic randomness of carbon nanotubes is leveraged to provide the unclonable aspect.

A method of manufacturing a semiconductor device is provided. The method includes depositing a first interconnect metal layer on a substrate; depositing a first barrier metal layer on the first interconnect metal layer; depositing a first dielectric layer on the first barrier metal layer; depositing a second barrier metal layer on the first dielectric layer; etching the second barrier metal layer to form a MIM capacitor region and a thin film resistor region; forming a hard mask on the second barrier metal layer and the first dielectric layer; forming an isolated interconnect pattern between the MIM capacitor region and the thin film resistor region; depositing an inter-metal dielectric layer on the hard mask; forming Via holes in the MIM capacitor region and the thin film resistor region, and filling the Via holes with metal to form a Via contact layer.

Stacks of electrically resistive materials and related apparatuses, electrical systems, and methods are disclosed. An apparatus includes one or more resistor devices including a substrate, first and second electrically resistive materials, and an electrically insulating material between the first and second electrically resistive materials. The substrate includes a semiconductor material. A stepped trench is defined in the substrate by sidewalls and horizontal surfaces of the semiconductor material. The first electrically resistive material and the second electrically resistive material are within the stepped trench. A method of manufacturing a resistor device includes forming a stepped trench in the substrate, forming an etch stop material within the stepped trench, disposing an electrically resistive material within the stepped trench, disposing an electrically insulating material on the electrically resistive material, and repeating the disposing the electrically resistive material and the disposing the electrically insulating material operations a predetermined number of times.

The present invention measures a temperature of a heating element and includes a first insulating layer having an electrical insulating function; a sensor electrode provided on an upper side of the first insulating layer and having a change in intensity of a current according to a change in heat generated by the heating element; and a second insulating layer covering an upper side of the sensor electrode, wherein the sensor electrode is disposed in parallel with the first insulating layer and having a plurality of bent portions from one end of the sensor electrode to the other end of the sensor electrode.

Surface mount components and related methods involve thin film circuits between first and second insulating substrates. The thin film circuits may include passive components, including resistors, capacitors, inductors, arrays of such components, networks, or filters of multiple passive components. Such thin film circuit(s) can be sandwiched between first and second insulating substrates with internal conductive pads which are exposed to the outside of the surface mount component and electrically connected to external terminations. External terminations may include at least one layer of conductive polymer. Optional shield layers may protect the surface mount components from signal interference. A cover substrate may be formed with a plurality of conductive elements that are designed to generally align with the conductive pads such that conductive element portions are exposed in groups along surfaces of a device.

A chip part is provided that includes a substrate 2 in which an element region 5 and an electrode region 16 are set, an insulating film (a first insulating film 9 and a second insulating film 3) which is formed on the substrate 2 and which selectively includes an internal concave/convex structure 18 in the electrode region 16 on a surface, a first connection electrode 3 and a second connection electrode 4 which include, at a bottom portion, an anchor portion 24 entering the concave portion 17 of the internal concave/convex structure 18 and which include an external concave/convex structure 6, 7 on a surface on the opposite side and a circuit element which is disposed in the element region 5 and which is electrically connected to the first connection electrode 3 and the second connection electrode 4.