A resistance assembly for a mobile device and a manufacturing method thereof are disclosed. The resistance assembly for a mobile device in accordance with an embodiment of the present invention includes: a substrate having a circuit formed thereon; first to third pads laminated and separated from one another on the substrate; first to third terminals connected to the first to third pads, respectively; and first and second resistors formed between the first and second terminals and between the second and third terminals, respectively, and serially connected to each other and configured to adjust electric current flowed into the circuit.

A metal oxide varistor (MOV) device including a MOV chip having first and second electrodes disposed on opposing side thereof, a first lead frame portion including a first contact tab electrically connected to the first electrode and a first lead contiguous with the first contact tab and extending away from the MOV chip, a second lead frame portion including a second contact tab electrically connected to the second electrode and a second lead contiguous with the second contact tab and extending away from the MOV chip, and a device body encasing the MOV chip, the first contact tab, the second contact tab, and portions of the first and second leads, wherein the first and second leads extend out of the device body and are bent into flat abutment with a bottom surface of the device body.

A chip resistor includes a substrate, two top electrodes, a resistor element, two back electrodes, and two side electrodes. The substrate has a top surface, a back surface and two side surface. The top and back surfaces face away in the thickness direction of the substrate. The side surfaces, spaced apart in a predetermined direction orthogonal to the thickness direction, are connected to the top and back surfaces. The top electrodes, spaced apart in the predetermined direction, are in contact with the top surface. The resistor element, disposed on the top surface, is connected to the top electrodes. The back electrodes, spaced apart in the predetermined direction, are in contact with the back surface. The side electrodes, held in contact with the side surfaces, are connected to the top and back electrodes. Each back electrode has a first and a second layer. The first layer is in contact with the back surface. The second layer, covering a part of the first layer, is made of a material containing metal particles and synthetic resin.

A chip resistor includes a substrate, two top electrodes, a resistor element, two back electrodes, and two side electrodes. The substrate has a top surface, a back surface and two side surface. The top and back surfaces face away in the thickness direction of the substrate. The side surfaces, spaced apart in a predetermined direction orthogonal to the thickness direction, are connected to the top and back surfaces. The top electrodes, spaced apart in the predetermined direction, are in contact with the top surface. The resistor element, disposed on the top surface, is connected to the top electrodes. The back electrodes, spaced apart in the predetermined direction, are in contact with the back surface. The side electrodes, held in contact with the side surfaces, are connected to the top and back electrodes. Each back electrode has a first and a second layer. The first layer is in contact with the back surface. The second layer, covering a part of the first layer, is made of a material containing metal particles and synthetic resin.

Embodiments include a method of stress testing an electronics package with components that include a visual indicator. In an embodiment, the method comprises populating a plurality of components on an electronics package. In an embodiment, the plurality of components each comprise a visual indicator that is responsive to heat. In an embodiment, the method further comprises stress testing the electronics package and categorizing the plurality of components based on the visual indicators. In an embodiment, the method may further comprise modifying the plurality of components.

A resistor includes a resistor main body, and a resin portion covering the resistor main body. The resin portion includes a radiation fin.

A resistor component includes a substrate having a first surface and a second surface, opposing each other; an external electrode disposed outside of the substrate; a resistive layer disposed on the first surface of the substrate, connected to the external electrode, and including an alloy of a first metal and a second metal; and a first protective layer disposed on the resistive layer and including any one of the first and second metals.

The method includes the steps of preparing at least three conductive elongated boards 711 made of an electrically conductive material and a resistive member 702 made of a resistive material, arranging the at least three conductive elongated boards 711 apart from each other along a width direction crossing a longitudinal direction in which one of the at least three conductive elongated boards 711 is elongated, forming a resistor aggregate 703 by bonding the resistive member 702 to the at least three conductive elongated boards 711, and collectively dividing the resistor aggregate 703 into a plurality of chip resistors by punching so that each of the chip resistors includes two electrodes and a resistor portion bonded to the two electrodes.

A chip resistor includes a substrate, a resistor layer, a first conductive layer, an insulating layer, a second conductive layer, a third conductive layer, and a fourth conductive layer. The first conductive layer is electrically connected to the resistor layer. The insulating layer covers the resistor layer and the first conductive layer. The second conductive layer covers the first conductive layer and the insulating layer. The third conductive layer covers the second conductive layer and the insulating layer. The fourth conductive layer covers the second conductive layer and the third conductive layer. Bonding strength between the third and fourth conductive layer is stronger than that between the second and fourth conductive layer.

The present invention is provided with a base electrode layer forming step of forming a base electrode layer on both surfaces of a thermistor wafer formed of a thermistor material, a chip forming step of obtaining a thermistor chip with a base electrode layer by cutting the thermistor wafer to form chips, a protective film forming step of forming a protective film formed of an oxide on an entire surface of the thermistor chip with a base electrode layer, a cover electrode layer forming step of forming a cover electrode layer by applying and sintering a conductive paste on an end surface of the thermistor chip with a base electrode layer, and a conduction heat treatment step of performing a heat treatment such that the base electrode layer and the cover electrode layer are electrically conductive, in which the electrode portion is formed.