A resistor element includes a base substrate, a resistor layer disposed on one surface of the base substrate, a first electrode layer and a second electrode layer disposed on the resistor layer spaced apart from each other, a third electrode layer disposed between the first electrode layer and the second electrode layer to be spaced apart from the first electrode layer and the second electrode layer and being thicker than each of the first electrode layer and the second electrode layer, and first to third plating layers disposed on the first to third electrode layers, respectively.

To provide a chip resistor in which a resistive element can be surely protected from an external environment and which is also excellent in corrosion resistance, a chip resistor 1 is configured to include an insulating substrate 2, a pair of front electrode 3 provided on opposite end portions of a front surface of the insulating substrate 2, a pair of back electrodes 7 provided on opposite end portions of a back surface of the insulating substrate 2, a resistive element 4 provided to extend onto the two front electrodes 3, a first insulating layer 5 covering the resistive element 4, a second insulating layer 6 made of a resin material to cover the first insulating layer 5, end surface electrodes 8 establishing electrical continuity between the front electrodes 3 and the back electrodes 7, plating layers 9 covering the end surface electrodes 8, etc. Rough surface portions 6a made rougher in surface roughness than any other portion of the second insulating layer 6 are formed at opposite end portions of the second insulating layer 6. End portions of the end surface electrodes 8 and the plating layers 9 are brought into tight contact with the rough surface portions 6a respectively.

A thermistor chip is provided, which includes a thermosensitive ceramic substrate, a surface electrode and a bottom electrode. The surface electrode and the bottom electrode are respectively arranged on the two surfaces of the thermosensitive ceramic substrate. The surface electrode is a silver layer. The bottom electrode consists of a silver layer, a titanium-tungsten alloy layer, a copper layer and a gold layer, laminating on the thermosensitive ceramic substrate in turn from inside to outside. A preparation method thereof is also provided. The thermistor chip can meet the requirements of both solder paste reflow soldering and wire bonding process simultaneously, and has the advantages of good bonding effect and high temperature resistance, high reliability and high stability.

An integrated circuit that can include a driver having a first driver output, and a first resistance coupled between a first node coupled to the first driver output and a second node. The first resistance can include a process resistor including a first material having a first temperature coefficient, and an interconnect resistor configured to provide at least 20% of the first resistance and including a second material having a second temperature coefficient which changes resistance in an opposite direction with temperature as compared to the first temperature coefficient. A first terminal of the interconnect resistor is directly connected to a first terminal of the process resistor.

A resistance assembly for a mobile device and a manufacturing method thereof are disclosed. The resistance assembly for a mobile device in accordance with an aspect of the present invention includes: a substrate having a circuit formed thereon; first to fourth pads laminated and separated from one another on the substrate; first to fourth terminals connected to the first to fourth pads, respectively, by being formed in a longitudinal direction along edges of lateral surfaces of a resistance body that are opposite to each other; and first and second resistors formed in between the first to fourth terminals along the opposite lateral and connected in parallel to each other on the resistance body and configured to adjust electric current flowed into the circuit.

The invention is to provide a resistor trimming method capable of adjusting a resistance value with ultrahigh precision and having excellent production efficiency. To achieve the object, a start point (S1) at a distance from a resistor (4) is irradiated with laser light while probes are brought into contact with a pair of surface electrodes (3) to measure a resistance value of the resistor (4). The place irradiated with the laser light is scanned so that a first trimming groove (5) extending in a direction perpendicular to a current direction can be formed in the resistor (4). Then, the place irradiated with the laser light is returned by a predetermined amount from an end point (first turning point (T1)) of the first trimming groove (5) to be set as a second turning point (T2). With the second turning point (T2) as a start point, scanning and cutting is performed to forma second trimming groove (6). Thus, the resistance value of the resistor (4) is adjusted to a target resistance value with high precision.

A chip resistor including, a substrate having a main surface, a first resistance circuit formed at the main surface of the substrate, a second resistance circuit formed at the main surface of the substrate apart from the first resistance circuit, a common internal electrode formed at the main surface of the substrate and electrically connected to the first resistance circuit and the second resistance circuit, a first internal electrode formed at the main surface of the substrate and electrically connected to the first resistance circuit, a second internal electrode formed at the main surface of the substrate and electrically connected to the second resistance circuit, and a dummy resistance circuit formed in a region between the first resistance circuit and the second resistance circuit at the main surface of the substrate so as to be in an electrically floating state.

A compact and refined chip resistor, with which a plurality of types of required resistance values can be accommodated readily with the same design structure, was desired. The chip resistor is arranged to have a resistor network on a substrate. The resistor network includes a plurality of resistor bodies arrayed in a matrix and having an equal resistance value. A plurality of types of resistance units are respectively arranged by one or a plurality of the resistor bodies being connected electrically. The plurality of types of resistance units are connected in a predetermined mode using connection conductor films and fuse films. By selectively fusing a fuse film, a resistance unit can be electrically incorporated into the resistor network or electrically separated from the resistor network to make the resistance value of the resistor network the required resistance value.

Provided is a method for producing a resistor, including a step of forming a through-hole in a sheet-like conductive material; a step of fitting a resistive element piece into the through-hole and thus forming joint portions where end surfaces of the resistive element piece are joined to respective side surfaces of the conductive material exposed by the through-hole; and stamping a region including the joint portions from the conductive material, thereby forming a resistor including a resistive element and a pair of electrodes.

The present invention provides a chip resistor and a method of making the same for alleviating stress resulted from thermal expansion difference and thus suppressing cracks. A chip resistor includes: a substrate, having a carrying surface and a mounting surface facing away from each other; a pair of upper electrodes, disposed at two ends of the carrying surface; a resistor, disposed on the carrying surface and between the pair of upper electrodes, and electrically connected to the pair of upper electrodes; a stress relaxation layer having flexibility and formed on the mounting surface of the substrate; a metal thin film layer, formed on a surface of the stress relaxation layer opposite to the substrate; a side electrode for electrically connecting the upper electrodes and the metal thin film layer; and a plating layer covering the side electrode and the metal thin film layer.