A process is provided for forming an integrated thin film resistor (TFR) in an integrated circuit (IC) device including IC elements and IC element contacts. A TFR film layer and TFR dielectric layer are formed over the IC structure, and a wet etch is performed to define a dielectric cap with sloped lateral edges over the TFR film layer. Exposed portions of the TFR film layer are etched to define a TFR element. A TFR contact etch forms contact openings over the TFR element, and a metal layer is formed to form metal layer connections to the IC element contacts and the TFR element. The sloped edges of the dielectric cap may improve the removal of metal adjacent the TFR element to prevent electrical shorts in the completed device. A TFR anneal to reduce a TCR of the TFR is performed at any suitable time before forming the metal layer.

Disclosed are various pallet assemblies for arc spray applications. In some embodiments, an assembly may include a top frame comprising a plurality of recesses each operable to receive an electronic device, and a bottom frame coupled to the top frame, wherein the bottom frame comprises a plurality of support structures, and wherein each support structure of the plurality of support structures is aligned with a corresponding recess of the plurality of recesses. The assembly may further include a mechanical device coupled to the top frame and the bottom frame, wherein the mechanical device is operable to bias the top frame and the bottom frame relative to one another.

Disclosed are various pallet assemblies for arc spray applications. In some embodiments, an assembly may include a top frame comprising a plurality of recesses each operable to receive an electronic device, and a bottom frame coupled to the top frame, wherein the bottom frame comprises a plurality of support structures, and wherein each support structure of the plurality of support structures is aligned with a corresponding recess of the plurality of recesses. The assembly may further include a mechanical device coupled to the top frame and the bottom frame, wherein the mechanical device is operable to bias the top frame and the bottom frame relative to one another.

A The heating element structure includes: a conductive metal substrate; a heating layer spaced apart from the conductive metal substrate and configured to generate heat in response to an electrical signal; electrodes in contact with the heating layer and configured to provide the electrical signal to the heating layer; and a first insulating layer on the conductive metal substrate, the first insulating layer comprising a first matrix material and a particle, wherein a difference between a coefficient of thermal expansion (CTE) of the first matrix material and a coefficient of thermal expansion of the particle is about 410.sup.6 per Kelvin or less.

A The heating element structure includes: a conductive metal substrate; a heating layer spaced apart from the conductive metal substrate and configured to generate heat in response to an electrical signal; electrodes in contact with the heating layer and configured to provide the electrical signal to the heating layer; and a first insulating layer on the conductive metal substrate, the first insulating layer comprising a first matrix material and a particle, wherein a difference between a coefficient of thermal expansion (CTE) of the first matrix material and a coefficient of thermal expansion of the particle is about 410.sup.6 per Kelvin or less.

A voltage-nonlinear resistor element 10 includes a voltage-nonlinear resistor (referred simply as resistor) 20 and a pair of electrodes 14 and 16 between which the resistor 20 is interposed. The resistor 20 has a multilayer structure including a first layer 21 composed primarily of zinc oxide, a second layer 22 composed primarily of zinc oxide, and a third layer 23 composed primarily of a metal oxide other than zinc oxide. The second layer 22 is adjacent to the first layer 21 and has a smaller thickness and a higher volume resistivity than the first layer 21. The third layer 23 is adjacent to the second layer 22.

A voltage-nonlinear resistor element 10 includes a voltage-nonlinear resistor (referred simply as resistor) 20 and a pair of electrodes 14 and 16 between which the resistor 20 is interposed. The resistor 20 has a multilayer structure including a first layer 21 composed primarily of zinc oxide, a second layer 22 composed primarily of zinc oxide, and a third layer 23 composed primarily of a metal oxide other than zinc oxide. The second layer 22 is adjacent to the first layer 21 and has a smaller thickness and a higher volume resistivity than the first layer 21. The third layer 23 is adjacent to the second layer 22.

A method for fabricating a varistor device is presented. In an embodiment the method includes providing a base body for the varistor device, wherein the base body comprises a ceramic material, providing a basic material for a base metal electrode region on the base body, exposing the base body with the basic material to a temperature under a protective gas atmosphere such that the base metal electrode region is formed and firmly connected to the base body and completing the varistor device.

A method for fabricating a varistor device is presented. In an embodiment the method includes providing a base body for the varistor device, wherein the base body comprises a ceramic material, providing a basic material for a base metal electrode region on the base body, exposing the base body with the basic material to a temperature under a protective gas atmosphere such that the base metal electrode region is formed and firmly connected to the base body and completing the varistor device.

The present invention relates to a chip resistor. A method of manufacturing a chip resistor comprising steps of: preparing an insulating substrate squarely segmented with vertical slits and horizontal slits, applying on the insulating substrate a conductive paste crossing over the horizontal slits, applying a resistor paste on the insulating substrate, forming trimming grooves to adjust resistivity of the resistor layers, and splitting the insulating substrate to form chip resistors, wherein the conductive paste comprises (i) a conductive powder comprising an agglomerated metal powder, wherein particle diameter (D50) of the agglomerated metal powder is 3 to 12 m and specific surface area (SA) of the agglomerated metal powder is 3.1 to 8.0 m.sup.2/g, (ii) a glass frit and (iii) an organic vehicle.