A low inductance component may include a multilayer, monolithic device including a first active termination, a second active termination, at least one ground termination, and a pair of capacitors connected in series between the first active termination and the second active termination. The lead(s) may be coupled with the first active termination, second active termination, and/or the at least one ground termination. The lead(s) may have respective length(s) and maximum width(s). A ratio of the length(s) to the respective maximum width(s) of the lead(s) may be less than about 20.

A double-sided copper-clad laminate that includes an adhesive layer and a copper foil in order on each of both surfaces of a resin film, the resin film is in a cured state at 25° C., and each of the copper foils has a maximum peak height Sp of 0.05 μm or more and 3.3 μm or less as measured in accordance with ISO 25178 on a surface on a side being in contact with the adhesive layer.

A low pass filter includes a first input/output terminal, a second input/output terminal, a signal line, inductors connected in the signal line, and capacitors connected between the signal line and ground. In the signal line, a capacitor is connected in parallel to the inductor that is connected closest to the first input/output terminal, and the inductor and the capacitor define a first parallel resonator.

A low pass filter includes a first input/output terminal, a second input/output terminal, a signal line, inductors connected in the signal line, and capacitors connected between the signal line and ground. In the signal line, a capacitor is connected in parallel to the inductor that is connected closest to the first input/output terminal, and the inductor and the capacitor define a first parallel resonator.

A cooling system for a capacitor may include a housing for the capacitor, the housing comprising of a bottom surface, a top surface, and at least one side surface connecting the bottom surface and the top surface, the housing further including: a bottom inlet manifold and a bottom outlet manifold extending along the bottom surface; an inlet side channel extending along the side surface, the inlet side channel being in fluid communication with the bottom inlet manifold; an outlet side channel extending along the side surface, the outlet side channel being in fluid communication with the bottom outlet manifold; a top inlet manifold extending along the top surface, the top inlet manifold being in fluid communication with the inlet side channel; and a top outlet manifold extending along the top surface, the top outlet manifold being in fluid communication with the outlet side channel.

An electronic component includes: a conductive pattern provided on the main surface of a substrate and constituting a lower electrode; a dielectric film that covers top and side surfaces of the conductive pattern; and a conductive pattern stacked on the top surface of the conductive pattern through the dielectric film and constituting an upper electrode. A part of the dielectric film that is parallel to the main surface of the substrate is removed at least partly. Partially removing a part of the dielectric film that is parallel to the main surface of the substrate allows stress relaxation. This prevents peeling at the interface between the lower electrode and the dielectric film.

An electronic component includes: a conductive pattern provided on the main surface of a substrate and constituting a lower electrode; a dielectric film that covers top and side surfaces of the conductive pattern; and a conductive pattern stacked on the top surface of the conductive pattern through the dielectric film and constituting an upper electrode. A part of the dielectric film that is parallel to the main surface of the substrate is removed at least partly. Partially removing a part of the dielectric film that is parallel to the main surface of the substrate allows stress relaxation. This prevents peeling at the interface between the lower electrode and the dielectric film.

In a described example, a method for forming a capacitor includes: forming a capacitor first plate over a non-conductive substrate; flowing ammonia and nitrogen gas into a plasma enhanced chemical vapor deposition (PECVD) chamber containing the non-conductive substrate; stabilizing a pressure and a temperature in the PECVD chamber; turning on radio frequency high frequency (RF-HF) power to the PECVD chamber; pretreating the capacitor first plate for at least 60 seconds; depositing a capacitor dielectric on the capacitor first plate; and depositing a capacitor second plate on the capacitor dielectric.

A multilayer ceramic electronic component includes first and second multilayer ceramic electronic component bodies facing each other in a length direction that connects first and second end surfaces. A first metal terminal is connected to a first outer electrode. A second metal terminal is connected to a fourth outer electrode. An outer casing covers the first and second multilayer ceramic electronic component bodies, and at least a portion of each of the first and second metal terminals. A third metal terminal is exposed from the outer casing.

A downhole tool may include a high-voltage power supply disposed within a housing to transform input power to the downhole tool from a first voltage to a second voltage greater than the first voltage. The high-voltage power supply may include an array of capacitors, which may include multiple rows of capacitors. The rows of capacitors may be parallel with a symmetric cross section as viewed from an end of the array of capacitors. The high-voltage power supply may also include diodes electrically coupled to the array of capacitors.