Provided is a ripple current generating circuit, which comprises an indicating circuit based on an existing ripple current generating circuit. The indicating circuit comprises a resistor, a capacitor, a diode, and a light-emitting diode (LED). The indicating circuit is formed by connecting the LED and the diode that are reversely connected in parallel first to the resistor in parallel and then to the capacitor in series. The capacitor is low in capacity and serves to block direct current while allowing high frequency to pass. With increasing ESR of a tested capacitor, a high-frequency ripple voltage generated by a high-frequency exciting current across the ESR may rise accordingly. Since the capacitor is capable of allowing high frequency to pass, the LED will emit light when the high-frequency ripple voltage reaches a particular threshold that can be adjusted by adjusting the resistance of the resistor.

Provided is a ripple current generating circuit, which comprises an indicating circuit based on an existing ripple current generating circuit. The indicating circuit comprises a resistor, a capacitor, a diode, and a light-emitting diode (LED). The indicating circuit is formed by connecting the LED and the diode that are reversely connected in parallel first to the resistor in parallel and then to the capacitor in series. The capacitor is low in capacity and serves to block direct current while allowing high frequency to pass. With increasing ESR of a tested capacitor, a high-frequency ripple voltage generated by a high-frequency exciting current across the ESR may rise accordingly. Since the capacitor is capable of allowing high frequency to pass, the LED will emit light when the high-frequency ripple voltage reaches a particular threshold that can be adjusted by adjusting the resistance of the resistor.

A hybrid power supply circuit, a method using a hybrid power supply circuit and method for producing a hybrid power supply circuit are disclosed. In an embodiment a hybrid power-supply circuit includes a first energy-storage device and a second energy-storage device, wherein the first and second energy-storage devices are combined in a module and electrically interconnected, and wherein the first energy-storage device is a solid-state accumulator.

A capacitor case sealed to retain electrolyte; a sintered anode disposed in the capacitor case, the sintered anode having a shape wherein the sintered anode includes a mating portion; a conductor coupled to the sintered anode, the conductor sealingly extending through the capacitor case to a terminal disposed on an exterior of the capacitor case; a sintered cathode disposed in the capacitor case, the sintered cathode having a shape that mates with the mating portion of the sintered anode such that the sintered cathode matingly fits in the mating portion of the sintered anode; a separator between the sintered anode and the sintered cathode; and a second terminal disposed on the exterior of the capacitor case and in electrical communication with the sintered cathode, with the terminal and the second terminal electrically isolated from one another.

A capacitor case sealed to retain electrolyte; a sintered anode disposed in the capacitor case, the sintered anode having a shape wherein the sintered anode includes a mating portion; a conductor coupled to the sintered anode, the conductor sealingly extending through the capacitor case to a terminal disposed on an exterior of the capacitor case; a sintered cathode disposed in the capacitor case, the sintered cathode having a shape that mates with the mating portion of the sintered anode such that the sintered cathode matingly fits in the mating portion of the sintered anode; a separator between the sintered anode and the sintered cathode; and a second terminal disposed on the exterior of the capacitor case and in electrical communication with the sintered cathode, with the terminal and the second terminal electrically isolated from one another.

Safe handling of link errors in a Peripheral Component Interconnect (PCI) express (PCIE) device is disclosed. In one aspect, safe handling of link errors involves detecting errors in a PCIE link and maintaining the PCIE link by preventing the reporting of detected errors and providing safe data to a host in communication with the PCIE link. A PCIE link can be established between a host (incorporating a root complex) and an endpoint device, through which the host can request the performance of operations (e.g., read data, write data) by the endpoint device. Circuitry and/or software can monitor the PCIE link and perform safe handling of link errors when they occur. The circuitry detects link errors and consumes them in such a manner that the host is unaware that an error has occurred and only safe (e.g., non-corrupted) data is provided to the host.

Safe handling of link errors in a Peripheral Component Interconnect (PCI) express (PCIE) device is disclosed. In one aspect, safe handling of link errors involves detecting errors in a PCIE link and maintaining the PCIE link by preventing the reporting of detected errors and providing safe data to a host in communication with the PCIE link. A PCIE link can be established between a host (incorporating a root complex) and an endpoint device, through which the host can request the performance of operations (e.g., read data, write data) by the endpoint device. Circuitry and/or software can monitor the PCIE link and perform safe handling of link errors when they occur. The circuitry detects link errors and consumes them in such a manner that the host is unaware that an error has occurred and only safe (e.g., non-corrupted) data is provided to the host.

In one aspect, solar energy systems are described herein. In some embodiments, such a comprises an electrochemical cell comprising a photoelectrode, a counter electrode, and an ion transport membrane disposed between the photoelectrode and counter electrode. The cell further comprises a first electrolyte solution disposed in fluid communication with the photoelectrode and the membrane, and a second electrolyte solution disposed in fluid communication with the membrane and the counter electrode. The first and/or second electrolyte solution comprises a solvated redox pair. Additionally, the cell also comprises a storage electrode, a first external electrical connection between the photoelectrode and the counter electrode, and a second external electrical connection between the counter electrode and the storage electrode. Components of the system define a liquid junction photovoltaic cell under light conditions and a galvanic cell under dark conditions.

In one aspect, solar energy systems are described herein. In some embodiments, such a comprises an electrochemical cell comprising a photoelectrode, a counter electrode, and an ion transport membrane disposed between the photoelectrode and counter electrode. The cell further comprises a first electrolyte solution disposed in fluid communication with the photoelectrode and the membrane, and a second electrolyte solution disposed in fluid communication with the membrane and the counter electrode. The first and/or second electrolyte solution comprises a solvated redox pair. Additionally, the cell also comprises a storage electrode, a first external electrical connection between the photoelectrode and the counter electrode, and a second external electrical connection between the counter electrode and the storage electrode. Components of the system define a liquid junction photovoltaic cell under light conditions and a galvanic cell under dark conditions.

A system that includes an energy device having an active region configured to generate or consume electrical energy provided by an electrical current is discussed. A current limiter is disposed between the energy device and a current collector layer. The current limiter controls the current flow between the energy device and the current collector layer. A plurality of electrochemical transistors (ECTs) are arranged in an array such that each ECT in the array provides localized current control for the energy device. Each ECT includes a gate electrode, a drain electrode, a source electrode, and a channel disposed between the drain and the source electrodes. An electrolyte electrically couples the gate electrode to the channel such that an electrical signal at the gate electrode controls electrical conductivity of the channel. The current collector layer is a shared drain or source electrode for the ECTs.