A method for inspecting a surface of a wafer, includes steps of: irradiating a surface of the wafer with a laser beam having three or more distinct wavelengths; detecting a reflected light from the surface of the wafer when the surface of the wafer is irradiated with the laser beam; and determining whether a foreign matter exists on the surface of the wafer based on reflectances of the surface of the wafer with respect to the laser beam having the three or more distinct wavelengths, wherein the step of determining whether the foreign matter exists includes a step of determining whether the foreign matter is a metal or a non-metal.

A method of manufacturing a semiconductor device includes forming a lower mold having lower layers stacked on a substrate and lower channel structures passing therethrough; forming an upper mold including upper layers stacked on the lower mold and upper channel structures passing therethrough; removing the upper mold to expose an upper surface of the lower mold; separating an upper original image in which traces of the upper channel structures are displayed, and a lower original image in which the lower channel structures are displayed, from an original image capturing the upper surface of the lower mold; inputting the upper original image into a learned neural network to acquire an upper restored image in which cross sections of the upper channel structures are displayed; and comparing the upper restored image with the lower original image to verify an alignment state of the upper and lower molds.

The invention provides a method for positioning a wafer and a semiconductor manufacturing apparatus, which are applied to thin film processes. The method includes: Step S1: Obtain the state distribution of the first surface of the first wafer after the thin film process is performed on the first wafer, wherein the first surface is the surface opposite to a surface that the thin film formed thereon in the thin film process; Step S2: Determine whether the first wafer is located at the ideal positioning center according to the state distribution of the first surface, when the first wafer is not located at the ideal positioning center, according to the state distribution of the first surface adjusts the positioning position of the second wafer to be subjected to the thin film process, so that the second wafer is positioned at the ideal positioning center during the thin film process. According to the present invention, the wafer is positioned at the ideal positioning center during the thin film process, thereby improving the quality of the thin film layer and the entire wafer (epitaxial wafer) after the thin film process, and improving the effect of the thin film process.

A temperature controlling apparatus includes a platen, a first and a second conduits, and a first and a second outlet thermal sensors. The first conduit includes a first inlet, a first outlet, and a first heater. A first fluid enters the first inlet and exits the first outlet, the first heater heats the first fluid to a first heating temperature, and the first fluid is dispensed on the platen. The second conduit includes a second inlet, a second outlet, and a second heater. A second fluid enters the second inlet and exits the second outlet, the second heater heats the second fluid to a second heating temperature, and the second fluid is dispensed on the platen. The first and the second outlet thermal sensors are respectively disposed at the first and the second outlets to sense temperatures of the first and the second fluid.

A substrate processing method includes performing a post-processing on a substrate subjected to a pre-processing, in the multiple chambers, acquiring a characteristic value of the substrate after the post-processing for respective chambers, calculating an actual value being an estimated value of the characteristic value when a processing condition of the post-processing is adjusted such that a difference between the characteristic value and a target value becomes small, acquiring a correction residual amount being a difference between the actual value and the target value for each chamber, calculating an average value of correction residual amounts of all of the chambers, correcting the pre-processing condition based on the average of the correction residual amounts, correcting the post-processing condition for each chamber based on the average of the correction residual amounts and the correction residual amount for each chamber; and performing the pre-processing and the post-processing based on the corrected conditions.

The present invention is an IC chip mounting apparatus including: an ejection unit configured to eject an adhesive toward a reference position of each antenna of an antenna continuous body, the antenna continuous body having a base material and plural inlay antennas continuously formed on the base material; a nozzle movable between a first position and a second position, the nozzle being configured to suck an IC chip, when located at the first position, and to place the IC chip on the adhesive at the reference position of each antenna, when located at the second position; a determination unit configured to determine whether an IC chip is sucked by the nozzle while the nozzle is moved from the first position to the second position; and a moving machine configured to move the nozzle away from the second position when it is determined by the determination unit that an IC chip is not sucked by the nozzle.

A wafer with a test structure includes a wafer with a front side and a back side. A first die, a second die, a third die and a scribe line are disposed on the wafer. The scribe line is positioned between the dice. The first die includes a first dielectric layer and a first metal connection disposed within and on the first dielectric layer. A test structure and a dielectric layer are disposed on the scribe line, wherein the test structure is on the dielectric layer. Two first trenches are respectively disposed between the first dielectric layer and the dielectric layer and disposed at one side of the dielectric layer. Two second trenches penetrate the wafer, and each of the two second trenches respectively connects to a corresponding one of the two first trenches. A grinding tape covers the front side of the wafer and contacts the test structure.

A method of testing a semiconductor package is provided. The method includes forming a first metallization layer, wherein the first metallization layer includes a first conductive pad electrically connected to a charge measurement unit and a charge receiving unit; performing a first test against the charge measurement unit through the first conductive pad to determine whether breakdown occurs in the charge measurement unit; and in response to determining that no breakdown occurs in the charge measurement unit, forming a second dielectric layer over the first metallization layer, wherein a portion of the first conductive pad is exposed from the second dielectric layer.

An object is to provide a measurement system or the like that enables selection of appropriate new measurement targets by performing measurement on a limited number of measurement points.

Proposed is a system including a measurement tool; and a computer system configured to communicate with the measurement tool, in which the computer system is configured to calculate, based on feature data of a plurality of locations on a wafer received from the measurement tool, an in-plane distribution of the feature data on the wafer (C), select, based on the calculated in-plane distribution, a new measurement point for acquiring the feature data (D), calculate, based on feature data acquired by measuring the selected new measurement point (B), a new in-plane distribution of the feature data on the wafer (F), and output at least one of the feature data of the new measurement point and the in-plane distribution which are acquired by executing the selection of the new measurement point and the calculation of the new in-plane distribution at least once (H).

Embodiments of this invention provide a measurement map configuration method and apparatus. A wafer to be inspected is provided. The wafer includes a plurality of inspection marks. A first inspection result is obtained based on a first set of inspection marks. A second set of inspection marks is selected based on a preset rule. The second set of inspection marks is less than the first set of inspection marks. A second inspection result is obtained based on the second set of inspection marks. If an overlay accuracy of the second inspection result matches an overlay accuracy the first inspection result, a measurement map for the wafer is set based on target inspection marks. The target inspection marks are the second set of inspection marks of the measurement map.