H01L22/20

METHOD OF PROCESSING WAFER, AND CHIP MEASURING APPARATUS

There is provided a method of processing a wafer having devices formed in respective areas on a face side thereof that are demarcated by a plurality of crossing projected dicing lines on the face side. The method of processing a wafer includes a wafer unit forming step of forming a wafer unit having a wafer, a tape, and an annular frame, a dividing step of dividing the wafer along the projected dicing lines into a plurality of device chips, a pick-up step of picking up one at a time of the device chips from the wafer unit, and a measuring step of measuring the device chip picked up in the pick-up step. The method also includes a distinguishing step, before the pick-up step, of inspecting properties of the devices to distinguish acceptable devices and defective devices among the devices and storing distinguished results.

Methods and systems for overlay measurement based on soft X-ray Scatterometry

Methods and systems for performing overlay and edge placement errors based on Soft X-Ray (SXR) scatterometry measurement data are presented herein. Short wavelength SXR radiation focused over a small illumination spot size enables measurement of design rule targets or in-die active device structures. In some embodiments, SXR scatterometry measurements are performed with SXR radiation having energy in a range from 10 to 5,000 electronvolts. As a result, measurements at SXR wavelengths permit target design at process design rules that closely represents actual device overlay. In some embodiments, SXR scatterometry measurements of overlay and shape parameters are performed simultaneously from the same metrology target to enable accurate measurement of Edge Placement Errors. In another aspect, overlay of aperiodic device structures is estimated based on SXR measurements of design rule targets by calibrating the SXR measurements to reference measurements of the actual device target.

Systems and methods for analyzing defects in CVD films

Embodiments of the present technology may include semiconductor processing methods that include depositing a film of semiconductor material on a substrate in a substrate processing chamber. The deposited film may be sampled for defects at greater than or about two non-contiguous regions of the substrate with scanning electron microscopy. The defects that are detected and characterized may include those of a size less than or about 10 nm. The methods may further include calculating a total number of defects in the deposited film based on the sampling for defects in the greater than or about two non-contiguous regions of the substrate. At least one deposition parameter may be adjusted as a result of the calculation. The adjustment to the at least one deposition parameter may reduce the total number of defects in a deposition of the film of semiconductor material.

METROLOGY APPARATUS
20230009864 · 2023-01-12 ·

Methods and apparatus for processing a substrate are provided. For example, metrology apparatus configured for use with a substrate processing platform comprise an interferometer configured to obtain a first set of measurements at a first set of points along a surface of a substrate, a sensor configured to obtain a second set of measurements at a second set of points different from the first set of points along the surface of the substrate, an actuator configured to position the interferometer and the sensor at various positions along a measurement plane parallel to the surface of the substrate for obtaining the first set of measurements and the second set of measurements, and a substrate support comprising a substrate support surface for supporting the substrate beneath the measurement plane while obtaining the first set of measurements and the second set of measurements.

Dynamic amelioration of misregistration measurement

A dynamic misregistration measurement amelioration method including taking at least one misregistration measurement at multiple sites on a first semiconductor device wafer, which is selected from a batch of semiconductor device wafers intended to be identical, analyzing each of the misregistration measurements, using data from the analysis of each of the misregistration measurements to determine ameliorated misregistration measurement parameters at each one of the multiple sites, thereafter ameliorating misregistration metrology tool setup for ameliorated misregistration measurement at the each one of the multiple sites, thereby generating an ameliorated misregistration metrology tool setup and thereafter measuring misregistration at multiple sites on a second semiconductor device wafer, which is selected from the batch of semiconductor device wafers intended to be identical, using the ameliorated misregistration metrology tool setup.

Method and apparatus for producing at least one modification in a solid body

A method and apparatus are provided. In an example, a volume portion of the solid body is exposed to light waves of different wavelengths, wherein the light waves are partly reflected at surfaces of the solid body. Light parameters of the reflected light waves are at least partly acquired using a sensor device. Distance information and/or intensity information are/is ascertained from at least a portion of the acquired light parameters. A thickness and/or a transmittance of the solid body in the volume portion are/is determined based upon the distance information and/or the intensity information. Laser radiation is introduced into the volume portion to produce a modification in the interior of the solid body, wherein at least one laser parameter of the laser radiation is set at least depending on the thickness and/or the transmittance such that the modification is at a predefined distance from a surface of the solid body.

UNIFORMITY CONTROL FOR PLASMA PROCESSING USING WALL RECOMBINATION
20230215702 · 2023-07-06 ·

A system, method, and apparatus for processing substrates. A plasma processing system includes a processing chamber having a chamber body having walls with a first material enclosing an interior volume. The plasma processing system further includes a plasma source designed to expose a substrate disposed within the processing chamber to plasma related fluxes. The first material has a first set of recombination coefficients associated with the plasma related fluxes. The plasma processing system further includes a second material disposed along a first region of the chamber body, the first material having a second set of plasma recombination coefficients associated with the plasma related fluxes. The second set of plasma recombination coefficients is different that the first set of plasma recombination coefficients.

Advanced process control system
11551954 · 2023-01-10 · ·

An advanced process control system including a first process tool, a second process tool, and a measurement tool is provided. The first processing tool is configured to process each of a plurality of wafers by one of a plurality of first masks, and provide a first process timing data. The second processing tool is configured to process the wafer processing by the first process tool by one of a plurality of second masks to provide a plurality of works. The second process tool provides a measurement trigger signal according to the first process timing data. The measuring tool is configured to determine whether to perform a measuring operation on each works in response to the measurement trigger signal, and correspondingly provide a measurement result.

Method and device for failure analysis using RF-based thermometry

According to the various examples, a fully integrated system and method for failure analysis using RF-based thermometry enable the detection and location of defects and failures in complex semiconductor packaging architectures. The system provides synchronous amplified RF signals to generate unique thermal signatures at defect locations based on dielectric relaxation loss and heating.

Method for aligning to a pattern on a wafer

A method for aligning to a pattern on a wafer is disclosed. The method includes the steps of obtaining a first inline image from a first sample wafer, obtaining a first contour pattern of an alignment mark pattern from the first inline image, using the first contour pattern to generate a first synthetic image in black and white pixels, using the first synthetic image as a reference to recognize the alignment mark pattern on a tested wafer, and aligning to a tested pattern on the tested wafer according to a position of the alignment mark pattern on the tested wafer and a coordinate information.