A chip on film package includes a base film, a patterned circuit layer, a chip and a reinforcing sheet. The base film includes a first surface, a second surface opposite to the first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The reinforcing sheet is disposed on the first surface and/or the second surface and exposes the chip, wherein a flexibility of the reinforcing sheet is substantially equal to or greater than a flexibility of the base film.

A chip on film package includes a base film, a patterned circuit layer, a chip and a reinforcing sheet. The base film includes a first surface, a second surface opposite to the first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The reinforcing sheet is disposed on the first surface and/or the second surface and exposes the chip, wherein a flexibility of the reinforcing sheet is substantially equal to or greater than a flexibility of the base film.

An organic interposer includes: a first organic insulating layer including a groove; a first metal wire located in the groove; a barrier metal material covering the first metal wire; and a second metal wire located above the first metal wire, wherein the barrier metal material includes: a first barrier metal film interposed between the first metal wire and an inner surface of the groove; and a second barrier metal film located on the first metal wire, and wherein the second metal wire is in contact with both of the first barrier metal film and the second barrier metal film.

An organic interposer includes: a first organic insulating layer including a groove; a first metal wire located in the groove; a barrier metal material covering the first metal wire; and a second metal wire located above the first metal wire, wherein the barrier metal material includes: a first barrier metal film interposed between the first metal wire and an inner surface of the groove; and a second barrier metal film located on the first metal wire, and wherein the second metal wire is in contact with both of the first barrier metal film and the second barrier metal film.

An electronic element mounting substrate includes a first substrate that has a first main surface, has a rectangular shape, and has a mounting portion for an electronic element on the first main surface, and a second substrate that is located on a second main surface opposite to the first main surface, is made of a carbon material, has a rectangular shape, has a third main surface facing the second main surface and a fourth main surface opposite to the third main surface, in which the third main surface or the fourth main surface has heat conduction in a longitudinal direction greater than heat conduction in a direction perpendicular to the longitudinal direction, and that has a recessed portion on the fourth main surface.

A component-embedded substrate includes: a plurality of insulating layers each including a wiring pattern formed on one surface; an embedded component including a connection terminal; and a plurality of vias that electrically connect the connection terminal to the wiring patterns adjacent to each other in a lamination direction. The plurality of insulating layers is laminated on the connection terminal. Each of the plurality of vias is composed of a via hole formed in the respective insulating layer of the plurality of the insulating layers and a conductive material provided in the via hole. One of the plurality of vias is a connection via directly connected to the connection terminal. Another of the plurality of vias is a first adjacent via adjacent to the connection via in the lamination direction. The first adjacent via is connected to the wiring pattern formed on a surface of a top insulating layer.

A module includes a substrate, which has a polygonal shape in a plan view, an electronic component and an electronic component, which are mounted on a main surface of the substrate, and side electrodes, which are provided on at least two side surfaces of a plurality of side surfaces that form the polygonal shape of the substrate. A conductor film coupled to the electronic component and a conductor film coupled to the electronic component are provided on the substrate. The conductor film extends to reach a side surface of the at least two side surfaces to be coupled to a side electrode provided on the side surface. The conductor film extends to reach a side surface of the at least two side surfaces, which is different from the side surface, to be coupled to a side electrode provided on the side surface.

A high-frequency electronic component includes a ceramic multilayer substrate, ground electrodes provided at different layers of the ceramic multilayer substrate, and a shielding film covering at least a side surface among surfaces of the ceramic multilayer substrate. Two or more of the ground electrodes are exposed to the side surface of the ceramic multilayer substrate but do not protrude from this side surface, and are electrically connected to the shielding film. On the side surface of the ceramic multilayer substrate, the two or more of the ground electrodes at least partially overlap each other in a thickness direction of the ceramic multilayer substrate, with a distance in the thickness direction between the overlapping ground electrodes being 5 μm or greater.

A high-frequency electronic component includes a ceramic multilayer substrate, ground electrodes provided at different layers of the ceramic multilayer substrate, and a shielding film covering at least a side surface among surfaces of the ceramic multilayer substrate. Two or more of the ground electrodes are exposed to the side surface of the ceramic multilayer substrate and are electrically connected to the shielding film. On the side surface of the ceramic multilayer substrate, the two or more of the ground electrodes do not overlap each other in a thickness direction of the ceramic multilayer substrate.

An element package includes a semiconductor element, a redistribution layer, a sealing resin body, and an insulating portion. The semiconductor element includes a semiconductor substrate having an element region and a scribe region, a main electrode and a pad disposed on a surface of the semiconductor substrate, and a protective film disposed above the element region on the surface of the semiconductor substrate. The sealing resin body seals the semiconductor element while exposing the main electrode and the pad. The insulating portion is disposed above the scribe region on the surface of the semiconductor element with a height not to exceed an outer peripheral edge portion of an upper surface of the protective film on the element region. The redistribution layer extends over the protective film and the insulating portion above the scribe region.