A high frequency circuit includes: a first wire provided on a front surface of a board and being in contact with a heat generation part; a second wire provided on the front surface of the board and connected to ground; and a chip resistor connected between the first wire and the second wire and having a thermal conductive characteristic and an electric insulation characteristic, and the first wire includes: a wire part which is disposed between the heat generation part and the chip resistor, and which has a characteristic impedance equal to an impedance as a reference for impedance matching in the first wire; and a wire part which is disposed on a low temperature side with the chip resistor being set as a boundary, and which has a thermal resistance higher than that of the chip resistor.

A method of manufacturing a semiconductor package includes mounting a first semiconductor chip and a second semiconductor chip on a substrate, forming a first film on a top surface of the first semiconductor chip, and loading the first semiconductor chip and the second semiconductor chip mounted on the substrate between a lower mold frame and an upper mold frame. The method further includes providing a molding material between the lower mold frame and the upper mold frame, removing the lower mold frame and the upper mold frame, and removing the first film on the top surface of the first semiconductor chip to expose the top surface of the first semiconductor chip.

A method of manufacturing a semiconductor package includes mounting a first semiconductor chip and a second semiconductor chip on a substrate, forming a first film on a top surface of the first semiconductor chip, and loading the first semiconductor chip and the second semiconductor chip mounted on the substrate between a lower mold frame and an upper mold frame. The method further includes providing a molding material between the lower mold frame and the upper mold frame, removing the lower mold frame and the upper mold frame, and removing the first film on the top surface of the first semiconductor chip to expose the top surface of the first semiconductor chip.

A support glass substrate of the present invention is a support glass substrate for supporting a substrate to be processed, the support glass substrate including lithium aluminosilicate-based glass, having a content of Li.sub.2O of from 0.02 mol % to 25 mol % in a glass composition, and having an average linear thermal expansion coefficient within a temperature range of from 30° C. to 380° C. of 38×10.sup.−7/° C. or more and 160×10.sup.−7/° C. or less.

A semiconductor package includes: a first structure having a first insulating layer disposed on one surface, and first electrode pads and first dummy pads penetrating through the first insulating layer, a second structure having a second insulating layer having the other surface bonded to the one surface and the first insulating layer and disposed on the other surface, and second electrode pads and second dummy pads that penetrate through the second insulating layer, the second electrode pads being bonded to the first electrode pads, respectively, and the second dummy pads being bonded to the first dummy pads, respectively. In the semiconductor chip, ratios of surface areas per unit area of the first and second dummy pads to the first and second insulating layers on the one surface and the other surface gradually decrease toward sides of the first and second structures.

A semiconductor package includes: a first structure having a first insulating layer disposed on one surface, and first electrode pads and first dummy pads penetrating through the first insulating layer, a second structure having a second insulating layer having the other surface bonded to the one surface and the first insulating layer and disposed on the other surface, and second electrode pads and second dummy pads that penetrate through the second insulating layer, the second electrode pads being bonded to the first electrode pads, respectively, and the second dummy pads being bonded to the first dummy pads, respectively. In the semiconductor chip, ratios of surface areas per unit area of the first and second dummy pads to the first and second insulating layers on the one surface and the other surface gradually decrease toward sides of the first and second structures.

Provided is an electronic component capable of reducing a possibility that insulating layers covering from outer edge portions of electrodes to surrounding portions, around the electrodes, of a substrate are separated from the electrodes and the substrate. An electronic component includes: a substrate; an electrode formed on a surface of the substrate; a protective portion covering at least a part of a peripheral portion of the electrode and a surrounding portion, around the electrode, of the surface of the substrate, across outer edge portions of the electrode, and extending in a circumferential direction along the outer edge portions of the electrode; and an extending portion extending, on the surface of the substrate, from the protective portion in an extending direction away from the electrode. A width of the extending portion perpendicular to the extending direction is longer than a width of the protective portion perpendicular to the circumferential direction.

A semiconductor device includes a substrate, a semiconductor chip, a resin, and a terminal. The substrate spreads along a first surface. The semiconductor chip is provided above the substrate in a first direction. The resin covers the semiconductor chip. The terminal is provided below the substrate in the first direction. The resin includes a first portion and a second portion. A height of the first portion in the first direction is higher than a height of the second portion in the first direction. An edge of the second portion in a second direction along the first surface is a part of an edge of the resin in the second direction.

A semiconductor device includes a substrate, a semiconductor chip, a resin, and a terminal. The substrate spreads along a first surface. The semiconductor chip is provided above the substrate in a first direction. The resin covers the semiconductor chip. The terminal is provided below the substrate in the first direction. The resin includes a first portion and a second portion. A height of the first portion in the first direction is higher than a height of the second portion in the first direction. An edge of the second portion in a second direction along the first surface is a part of an edge of the resin in the second direction.

When a semiconductor package is stored in a transport tray and when a semiconductor package is transported by a transport tray, the semiconductor package comes into contact with the side wall of the transport tray, so that the end face of the semiconductor package is chipped and dust is generated from the end face of the semiconductor package. Provided is a technology for a semiconductor package that includes a multilayer structure having at least a synthetic resin layer and includes an outermost edge portion such that the end face of the synthetic resin layer protrudes outward compared to the end faces of the other layers constituting the multilayer structure.