H01L23/32

Integrated circuit package and method

In an embodiment, a device includes: a package component including: integrated circuit dies; an encapsulant around the integrated circuit dies; a redistribution structure over the encapsulant and the integrated circuit dies, the redistribution structure being electrically coupled to the integrated circuit dies; sockets over the redistribution structure, the sockets being electrically coupled to the redistribution structure; and a support ring over the redistribution structure and surrounding the sockets, the support ring being disposed along outermost edges of the redistribution structure, the support ring at least partially laterally overlapping the redistribution structure.

CHIP PACKAGE STRUCTURE WITH ANCHOR STRUCTURE AND METHOD FOR FORMING THE SAME
20220359422 · 2022-11-10 ·

A chip package structure is provided. The chip package structure includes a wiring substrate having a surface. The chip package structure includes a chip structure over the surface of the wiring substrate. The chip package structure includes an antiwarpage structure over the surface of the wiring substrate. The antiwarpage structure surrounds the chip structure. The chip package structure includes a first anchor structure affixed to the surface of the wiring substrate and adjacent to a first lower portion of the antiwarpage structure. The first lower portion is between the first anchor structure and the chip structure, and the first anchor structure is electrically isolated from the chip structure.

CHIP PACKAGE STRUCTURE WITH ANCHOR STRUCTURE AND METHOD FOR FORMING THE SAME
20220359422 · 2022-11-10 ·

A chip package structure is provided. The chip package structure includes a wiring substrate having a surface. The chip package structure includes a chip structure over the surface of the wiring substrate. The chip package structure includes an antiwarpage structure over the surface of the wiring substrate. The antiwarpage structure surrounds the chip structure. The chip package structure includes a first anchor structure affixed to the surface of the wiring substrate and adjacent to a first lower portion of the antiwarpage structure. The first lower portion is between the first anchor structure and the chip structure, and the first anchor structure is electrically isolated from the chip structure.

Mounting structure for heater element, method for mounting heater element, and power conversion device
11574852 · 2023-02-07 · ·

A mounting structure for a heater element includes a heater element having a surface to be cooled, a board on which the heater element is mounted, a cooling member that cools the surface to be cooled of the heater element mounted on the board, and a supporting member temporarily fixed to the board, the supporting member temporarily fixing the heater element.

CHIP PACKAGE FABRICATION KIT AND CHIP PACKAGE FABRICATING METHOD THEREOF
20230077857 · 2023-03-16 ·

A chip package fabricating kit includes a metal cover, at least one screw, and at least one screw cap. The metal cover includes a cap portion and at least one leg. The cap portion substantially presses against the BGA package. The leg substantially presses a PCB board that loads the BGA package. The leg forms a concave space with the metal cover for substantially encompassing the BGA package. Each the screw screws through a corresponding leg from top to bottom. Each the screw screws the PCB board at a first side. The screw cap respectively corresponds to the screw and one leg. The screw cap caps and fixes a tail of its corresponding screw for affixing the PCB board. A height of the concave space is dynamically adjusted by adjusting a degree that the screw screws with the screw cap. Such that the concave space substantially clamps the BGA package.

CHIP PACKAGE FABRICATION KIT AND CHIP PACKAGE FABRICATING METHOD THEREOF
20230077857 · 2023-03-16 ·

A chip package fabricating kit includes a metal cover, at least one screw, and at least one screw cap. The metal cover includes a cap portion and at least one leg. The cap portion substantially presses against the BGA package. The leg substantially presses a PCB board that loads the BGA package. The leg forms a concave space with the metal cover for substantially encompassing the BGA package. Each the screw screws through a corresponding leg from top to bottom. Each the screw screws the PCB board at a first side. The screw cap respectively corresponds to the screw and one leg. The screw cap caps and fixes a tail of its corresponding screw for affixing the PCB board. A height of the concave space is dynamically adjusted by adjusting a degree that the screw screws with the screw cap. Such that the concave space substantially clamps the BGA package.

CHIP MODULE AND ELECTRONIC DEVICE
20230084279 · 2023-03-16 ·

A chip module includes a circuit board (2), a slot (21) disposed on a surface of one side of the circuit board (2), a lidless packaged chip (5), a heat radiator (4), and a substrate fixing assembly (6). The lidless packaged chip (5) includes a substrate (51) and a die (52) packaged on the substrate (51). The slot (21) is electrically connected to the circuit board (2), the lidless packaged chip (5) has a connecting part on one side of the substrate (51) facing away from the die (52), and the connecting part is inserted into the slot (21). The heat radiator (4) is press-fitted on one side of the die (52) facing away from the circuit board (2). The substrate fixing assembly (6) is press-fitted at a periphery of one side of the substrate (51) facing away from the circuit board (2) and avoids the die (52).

PACKAGE STRUCTURE WITH BUFFER LAYER EMBEDDED IN LID LAYER

Provided is a package structure including a substrate, a stiffener ring, an eccentric die, a lid layer, and a buffer layer. The stiffener ring is disposed on the substrate. The stiffener ring has an inner perimeter to enclose an accommodation area. The eccentric die is disposed within the accommodation area on the substrate. The eccentric die is offset from a center of the accommodation area to close to a first side of the stiffener ring. The lid layer is disposed on the stiffener ring and overlays the eccentric die. The buffer layer is embedded in the lid layer between the first side of the stiffener ring and the eccentric die. The buffer layer has a thickness less than a thickness of the lid layer.

CHIP SOCKET, TESTING FIXTURE AND CHIP TESTING METHOD THEREOF
20230069959 · 2023-03-09 ·

The present application discloses a chip socket, a testing fixture and a chip testing method thereof. The chip socket includes a pedestal, a plurality of conductive traces, a plurality of clamp structures, and a plurality of electrical contacts. The plurality of conductive traces are formed in the pedestal. The plurality of clamp structures are conductive and disposed on the first surface of the pedestal, and at least one of the plurality of clamp structures is coupled to a corresponding conductive trace and configured to clamp a solder ball of a chip to be tested. The plurality of electrical contacts are disposed on the second surface of the pedestal, and at least one of the plurality of electrical contacts is coupled to a corresponding clamp structure through a corresponding conductive trace.

CHIP SOCKET, TESTING FIXTURE AND CHIP TESTING METHOD THEREOF
20230069959 · 2023-03-09 ·

The present application discloses a chip socket, a testing fixture and a chip testing method thereof. The chip socket includes a pedestal, a plurality of conductive traces, a plurality of clamp structures, and a plurality of electrical contacts. The plurality of conductive traces are formed in the pedestal. The plurality of clamp structures are conductive and disposed on the first surface of the pedestal, and at least one of the plurality of clamp structures is coupled to a corresponding conductive trace and configured to clamp a solder ball of a chip to be tested. The plurality of electrical contacts are disposed on the second surface of the pedestal, and at least one of the plurality of electrical contacts is coupled to a corresponding clamp structure through a corresponding conductive trace.