Patent classifications
H01L23/32
SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
An organic interposer includes: a first organic insulating layer including a groove; a first metal wire located in the groove; a barrier metal material covering the first metal wire; and a second metal wire located above the first metal wire, wherein the barrier metal material includes: a first barrier metal film interposed between the first metal wire and an inner surface of the groove; and a second barrier metal film located on the first metal wire, and wherein the second metal wire is in contact with both of the first barrier metal film and the second barrier metal film.
SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
An organic interposer includes: a first organic insulating layer including a groove; a first metal wire located in the groove; a barrier metal material covering the first metal wire; and a second metal wire located above the first metal wire, wherein the barrier metal material includes: a first barrier metal film interposed between the first metal wire and an inner surface of the groove; and a second barrier metal film located on the first metal wire, and wherein the second metal wire is in contact with both of the first barrier metal film and the second barrier metal film.
STIFFENER RING AND SURFACE PACKAGING ASSEMBLY
This application provides a stiffener ring and a surface packaging assembly. The stiffener ring is configured to correct warpage of a substrate of the surface packaging assembly. The stiffener ring includes an annular stiffener ring body and an adjustment block that is disposed at a same layer as the stiffener ring body and that is fastened to at least one corner of the stiffener ring body.
A coefficient of thermal expansion of the adjustment block is less than a coefficient of thermal expansion of the stiffener ring body. Coordination between the adjustment block and the stiffener ring body alleviates an “M-shape” overpressure phenomenon of a warpage deformation caused by the stiffener ring to the substrate at a high temperature, reduces warpage of the substrate, and improves flatness of the surface packaging assembly.
STIFFENER RING AND SURFACE PACKAGING ASSEMBLY
This application provides a stiffener ring and a surface packaging assembly. The stiffener ring is configured to correct warpage of a substrate of the surface packaging assembly. The stiffener ring includes an annular stiffener ring body and an adjustment block that is disposed at a same layer as the stiffener ring body and that is fastened to at least one corner of the stiffener ring body.
A coefficient of thermal expansion of the adjustment block is less than a coefficient of thermal expansion of the stiffener ring body. Coordination between the adjustment block and the stiffener ring body alleviates an “M-shape” overpressure phenomenon of a warpage deformation caused by the stiffener ring to the substrate at a high temperature, reduces warpage of the substrate, and improves flatness of the surface packaging assembly.
SEMICONDUCTOR APPARATUS, SOCKET, AND ELECTRONIC APPARATUS
A semiconductor apparatus includes a semiconductor device configured to include a first pad, and a socket provided over a first pad side of the semiconductor device, and configured to include, a base configured to face the semiconductor device, a first terminal provided over a semiconductor device side of the base, configured to include flexibility against a load in a direction from the semiconductor device toward the base, and coupled to the first pad, a first tubular barrier provided over the semiconductor device side and configured to surround the first terminal, and a first elastic body provided over the semiconductor device side, and configured to support the first tubular barrier and energize the first tubular barrier in a direction from the base toward the semiconductor device.
Packages with Si-substrate-free interposer and method forming same
A method includes forming a plurality of dielectric layers, forming a plurality of redistribution lines in the plurality of dielectric layers, etching the plurality of dielectric layers to form an opening, filling the opening to form a through-dielectric via penetrating through the plurality of dielectric layers, forming a dielectric layer over the through-dielectric via and the plurality of dielectric layers, forming a plurality of bond pads in the dielectric layer, bonding a device die to the dielectric layer and a first portion of the plurality of bond pads through hybrid bonding, and bonding a die stack to through-silicon vias in the device die.
Packages with Si-substrate-free interposer and method forming same
A method includes forming a plurality of dielectric layers, forming a plurality of redistribution lines in the plurality of dielectric layers, etching the plurality of dielectric layers to form an opening, filling the opening to form a through-dielectric via penetrating through the plurality of dielectric layers, forming a dielectric layer over the through-dielectric via and the plurality of dielectric layers, forming a plurality of bond pads in the dielectric layer, bonding a device die to the dielectric layer and a first portion of the plurality of bond pads through hybrid bonding, and bonding a die stack to through-silicon vias in the device die.
IC socket for semiconductor
Provided is an IC socket for a semiconductor capable of preventing adhesion of dust to a photodetection surface provided on an opposite side of a contact surface of an image sensor with no contact with the photodetection surface. The IC socket for a semiconductor includes: a seat (12) that has an attachment surface (12a) to which an image sensor (60) is attached; a base (10) that has a placement surface (10b) on which the seat (12) is placed and a secured surface (10a) located on an opposite side of the placement surface (10b) and secured to an inspection substrate; and a lid member (18) that does not come into contact with the image sensor (60) and that covers a back surface region (80) on a side of a back surface (64) of the image sensor (60) when the image sensor (60) is attached to the seat (12).
IC socket for semiconductor
Provided is an IC socket for a semiconductor capable of preventing adhesion of dust to a photodetection surface provided on an opposite side of a contact surface of an image sensor with no contact with the photodetection surface. The IC socket for a semiconductor includes: a seat (12) that has an attachment surface (12a) to which an image sensor (60) is attached; a base (10) that has a placement surface (10b) on which the seat (12) is placed and a secured surface (10a) located on an opposite side of the placement surface (10b) and secured to an inspection substrate; and a lid member (18) that does not come into contact with the image sensor (60) and that covers a back surface region (80) on a side of a back surface (64) of the image sensor (60) when the image sensor (60) is attached to the seat (12).
Integrated Circuit Packages Having Support Rings
In an embodiment, a device includes: a package component including: integrated circuit dies; an encapsulant around the integrated circuit dies; a redistribution structure over the encapsulant and the integrated circuit dies, the redistribution structure being electrically coupled to the integrated circuit dies; sockets over the redistribution structure, the sockets being electrically coupled to the redistribution structure; and a support ring over the redistribution structure and surrounding the sockets, the support ring being disposed along outermost edges of the redistribution structure, the support ring at least partially laterally overlapping the redistribution structure.