H01L2224/01

Semiconductor package with interlocked connection

A semiconductor package includes a block having opposing first and second main surfaces and sides between the first and second main surfaces, and an encapsulation material at least partly covering the block. One or both of the main surfaces of the block has recessed regions. The recessed regions do not extend completely through the block from one main surface to the other main surface. The encapsulation material fills the recessed regions to form an interlocked connection between the block and the encapsulation material. Additional semiconductor package embodiments are provided.

DIODE HAVING A PLATE-SHAPED SEMICONDUCTOR ELEMENT
20180247934 · 2018-08-30 ·

A diode is provided having a plate-shaped semiconductor element that includes a first side and a second side, the first side being connected by a first connecting layer to a first metallic contact and the second side being connected by a second connecting layer to a second metallic contact, the first side having a diode element in a middle area and having a further diode element in an edge area of the first side, which has crystal defects as a result of a separating process of the plate-shaped semiconductor element, the first connecting layer only establishing an electrical contact to the diode element and not to the further diode element and, on the first side, the further diode element having an exposed contact, which may be electrically contacted by the first connecting layer.

Substrate design for semiconductor packages and method of forming same

An embodiment device includes a first die, a second die, one or more redistribution layers (RDLs) electrically connected to the first die, a plurality of connectors on a surface of the one or more RDLs and a package substrate electrically connected to the first die and the second die. The package substrate is electrically connected to the first die through the one or more RDLs and the plurality of connectors. The package substrate comprises a cavity, and the second die is at least partially disposed in the cavity.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

A semiconductor device has a first board (10); and an intermediate layer (20) being provided on the first board (10) and having a plurality of connectors (31), (41). The first board (10) has a positioning section (5) that positions the intermediate layer (20). The intermediate layer (10) is provided with a positioning insertion section (37), (47), into which the positioning section (5) is inserted.

DISPLAY APPARATUS AND FABRICATING METHOD THEREOF

The present application discloses a display apparatus having a driver integrated circuit (IC) bonding area for bonding a plurality of signal lines with a driver IC. The display apparatus includes a conductive line layer in a peripheral area of the display apparatus, configured to discharge electrostatic charge in the driver IC bonding area.

Semiconductor package and method of forming the same

According to an exemplary embodiment, a semiconductor package is provided. The semiconductor package includes: a chip having a plurality of joint pads; a component having a plurality of metal caps on one side and having a grinded surface on the other side, wherein the metal caps are in contact with the joint pads of the chip.

PRESSURE CONTACT-TYPE SEMICONDUCTOR MODULE
20180175007 · 2018-06-21 · ·

A pressure contact-type semiconductor module includes a plurality of semiconductor units disposed side-by-side, each of the semiconductor units including: a semiconductor device substrate; a first electrode formed below the semiconductor device substrate, a second electrode formed above the semiconductor device substrate, an electrode plate electrically connected to the second electrode; and a pressure contact adjustment member screwed into the electrode plate, the pressure contact adjustment member having a top surface as a pressure contact-receiving surface to which a lead-out electrode plate that is common to the plurality of semiconductor units is to be pressure-contacted, levels of the respective top surfaces of the pressure contact adjustment members in the plurality of semiconductor units being adjustable to match a reference pressure contact plane so that contact pressures in the respective top surfaces applied by the lead-out electrode plate are substantially the same among the semiconductor units.

Wiring body assembly, structure with conductor layer, and touch sensor
09983448 · 2018-05-29 · ·

A wiring body assembly includes a first wiring body that includes a first resin layer serving as a support layer and a first conductor layer provided on the first resin layer that includes a first terminal, a second wiring body that includes a third terminal, and a connection body that includes a resin material and conductive particle dispersed in the resin material. The connection body is interposed between the first and third terminals such that the first wiring body and the second wiring body are electrically connected. The first terminal includes terminal conductor wires arranged in the shape of a mesh and the connection body is in a gap between the terminal conductor wires.

MOLDED INTELLIGENT POWER MODULE

An intelligent power module (IPM) has a first, second, third and fourth die paddles, a first, second, third, fourth, fifth and sixth metal-oxide-semiconductor field-effect transistors (MOSFETs), a tie bar, an IC, a plurality of leads and a molding encapsulation. The first MOSFET is attached to the first die paddle. The second MOSFET is attached to the second die paddle. The third MOSFET is attached to the third die paddle. The fourth, fifth and sixth MOSFETs are attached to the fourth die paddle. The IC is attached to the tie bar. The molding encapsulation encloses the first, second, third and fourth die paddles, the first, second, third, fourth, fifth and sixth MOSFETs, the tie bar and the IC. The IPM is a small-outline package. It reduces system design time and improves reliability. The IC includes boost diodes. It reduces a package size of the IPM.

WAFER DICING METHOD

A wafer dicing method comprises providing a wafer and performing a cutting procedure and a contacting procedure. The wafer includes a plurality of dies and a metal layer, wherein the metal layer is formed on a scribe line which is formed between adjacent dies. A cutter is used to cut the metal layer along the scribe line during the cutting procedure to form a plurality of dies on the wafer, and the metal layer cut by the cutter remains a plurality of metal burrs on the dies. A brush is used to contact with the metal burrs along the cutting slot during the contracting procedure to prevent each of the metal burrs from protruding from a surface of each of the dies.