A laser structure, including: a dielectric matrix formed of a first material; a laser source formed within the dielectric matrix and formed of a semiconductor material; and a plurality of side confining features formed within the dielectric matrix and extending parallel to and along a length of the laser source. The plurality of side confining features are formed of the semiconductor material.

A semiconductor light-emitting device including a light-emitting layer, a first N-type waveguide layer and a plurality of semiconductor layers is provided. The light light-emitting layer has a first side and a second side opposite to the first side. The first N-type waveguide layer is disposed at the first side, and the semiconductor layers are disposed at the second side. The semiconductor layers include at least one P-type semiconductor layer and a plurality of N-type semiconductor layers, and a quantity of the N-type semiconductor layers is more than a quantity of the at least one P-type semiconductor layer.

In an embodiment, a laser includes a gain section. The gain section includes an active region, an upper separate confinement heterostructure (SCH), and a lower SCH. The upper SCH is above the active region and has a thickness of at least 60 nanometers (nm). The lower SCH is below the active region and has a thickness of at least 60 nm.

In an embodiment, a laser includes a gain section. The gain section includes an active region, an upper separate confinement heterostructure (SCH), and a lower SCH. The upper SCH is above the active region and has a thickness of at least 60 nanometers (nm). The lower SCH is below the active region and has a thickness of at least 60 nm.

A light emitting device is provided that makes it possible to reduce absorption of light by an electrode. The light emitting device includes a substrate, and a laminated structure provided to the substrate, wherein the laminated structure includes a first semiconductor layer, a second semiconductor layer different in conductivity type from the first semiconductor layer, and an active layer disposed between the first semiconductor layer and the second semiconductor layer, the first semiconductor layer is disposed between the substrate and the active layer, a recessed part is disposed at an opposite side to the substrate side of the laminated structure, the recessed part is provided with a low refractive-index part lower in refractive index than the second semiconductor layer, a depth of the recessed part is no larger than a distance between a surface at an opposite side to the substrate side of the laminated structure and the active layer, and an electrode is disposed at an opposite side to the substrate side of the laminated structure.

Solid-state optical devices (10) enable tuning of an electrically tunable depletion region (200) to reduce and block lateral (in-junction) carrier spreading. This capability reduces the negative effects of gain-guiding in the junction plane and reduces an astigmatism of an emitted light beam. The tunable depletion region is created by forming a highly resistive Schottky contact (105, 110) or metal-insulator-semiconductor (MIS) structure (205, 210) next to a waveguide (optical mode propagation) and current injection region (215), where lateral spread due to diffusion is expected. The depletion region area is tuned by applying a bias to the highly resistive Schottky contact or the MIS contact structure. Such contacts or similar lossy structures reduce in-junction plane gain-guiding also when unbiased by creating additional optical loss for the mode, thus reducing the effective carrier density participating in light generation, thereby reducing astigmatism.

Embodiments regard a semiconductor device including an oxide current aperture. An embodiment of a semiconductor device includes an N-type semiconductor layer; an active region on the N-type semiconductor layer, the N-type semiconductor layer located on a first side of the active layer; a P-type semiconductor layer located on a second, opposite side of the active layer; and one or more oxide current apertures including a first oxide current apertures in close proximity to the active region, wherein each oxide current aperture includes a non-oxidized region surrounded by an oxidized region.

A broad area laser diode is configured to include an anti-guiding layer located outside of the active region of the device. The anti-guiding layer is formed of a high refractive index material that serves to de-couple unwanted, higher-order lateral modes (attributed to thermal lensing problems) from the lower-order mode output beam of output signal from the laser diode. The anti-guiding layer is formed using a single epitaxial growth step either prior to or subsequent to the steps used to grow the epitaxial layers forming the laser diode itself, thus creating a structure that provides suppression of unwanted higher-order modes without requiring a modification of specific process steps used to fabricate the laser diode itself.

A quantum cascade laser includes a semiconductor substrate and an active layer having a cascade structure, in which unit layered bodies, each composed of a quantum well light emitting layer and an injection layer, are stacked, wherein the unit layered body has a subband level structure having an upper laser level, a lower laser level, and a relaxation miniband composed of at least two energy levels with an energy spacing smaller than the energy difference (E.sub.UL) between the upper laser level and the lower laser level, the energy width of the relaxation miniband is smaller than the energy (E.sub.LO−E.sub.UL) obtained by subtracting the energy difference (E.sub.UL) from the energy (E.sub.LO) of longitudinal optical phonons, and electrons subjected to the intersubband transition are relaxed in the relaxation miniband and are injected into a quantum well light emitting layer in a subsequent unit layered body.

Integrated circuitry is fabricated from semiconductor layers formed on a substrate, which include at least one n-type layer, an inverted p-type modulation doped quantum well (mod-doped QW) structure, a non-inverted n-type mod-doped QW structure, and at least one p-type layer including a first P+-type layer formed below a second P-type layer. An etch operation exposes the second p-type layer. P-type ions are implanted into the exposed second p-type layer. A gate electrode of a n-channel HFET device is formed in contact with the p-type ion implanted region. Source and drain electrodes of the n-channel HFET device are formed in contact with n-type ion implanted regions formed in contact with the n-type mod-doped QW structure. P-channel HFET devices, complementary BICFET devices, stacked complementary HFET devices and circuits and/or logic gates based thereon, and a variety of optoelectronic devices and optical devices can also be formed as part of the integrated circuitry.