A power system including a gate driver configured with test circuitry to detect faults is disclosed. The power system may be configured to test the fault detection circuitry in order to confirm its ability to detect faults. Various methods and circuit implementations are disclosed to determine the ability of the system to detect faults. The testing may include different configurations and protocols in order to make conclusions about which components are likely responsible for a failure. These components may include components included in the gate driver or externally coupled to the gate driver. The disclose approach does not significantly add complexity because a test input to initiate a test may be communicated from a low voltage side to a high voltage side over a shared communication channel.

An electrical circuit protection device a processor-based controller configured to operate at least one solid state switching element in a manner responsive to a variety of different time-current conditions to protect a plurality of different electrical loads. A field deployable adaptor device is configured to communicate with the controller. The controller is configured with at least one pre-preprogrammed control algorithm or at least one selected setting for a control algorithm executable by the controller. At least one pre-preprogrammed control algorithm or at least one selected setting are predetermined by a manufacturer of the circuit protector device.

A current sense short protection circuit includes a switch unit, a current sensing unit, a detection circuit and a short detection module. The first terminal of the switch unit receives a first voltage. The control terminal of the switch unit receives a control signal. The first terminal of the current sensing unit is coupled to the second terminal of the switch unit. The second terminal of the current sensing unit receives a second voltage. The detection unit receives the second voltage and a third voltage provided by the first terminal of the current sensing unit, and generates a detection signal according to the second voltage and the third voltage. The short detection module receives the first voltage, the second voltage and the detection signal, and generates a short detection signal according to the first voltage, the second voltage and the detection signal.

A microgrid overcurrent protection device and a method for overcurrent protection of a microgrid. The protection device including a voltage controlled overcurrent detector for detecting an overcurrent above an overcurrent threshold and a phase directional detector arranged for current direction in a downstream or an upstream direction. The overcurrent threshold of the voltage controlled overcurrent detector is set at an upper overcurrent threshold when a measured voltage Vm is above a threshold voltage Vs and set at a lower overcurrent threshold when the measured voltage Vm is below the threshold voltage Vs. The device further includes a timer arranged for generating a trigger signal with a first delay time period when a downstream current direction and an overcurrent are detected and with a second delay time period when an upstream current direction and an overcurrent are detected.

Digital isolator devices, and many other devices, have a maximum device junction temperature, which, if exceeded, may cause device failure and the integrity of the isolation is no longer guaranteed. The use of an electronic fuse, eFuse, arranged in series with the digital isolator, provides a protection scheme for the digital isolator in which current is limited by the eFuse when it is determined that the supply current of the digital isolator exceeds a predetermined threshold that would the cause junction temperature to increase above an absolute maximum rating. As such, the integrity of the digital isolator is preserved in the event of a system fault.

A circuit for detecting faults affecting a power transistor comprises a conditioning circuit, a first fault status circuit, and a fault signaling circuit. The power transistor is turned on and off by assertion and de-assertion, respectively, of an input signal. The conditioning circuit produces a conditioned gate voltage signal from a gate voltage of the power transistor. The first fault status circuit asserts a first fault indication when the conditioned gate voltage signal is greater than a first fault reference voltage during a first interval after the assertion of the input signal. The fault signaling circuit asserts a fault signal in response to the first fault indication being asserted, and de-asserting the fault signal in response to the input signal being de-asserted.

Ground-fault circuit interrupter positioned between energy controlled supply circuit and load circuit which includes fault detection circuit that senses ground path current leakage to the load circuit, fault processing circuit that detects presence of fault and generates fault output signal when fault detected, and control circuit switch connected to fault processing signal output, wherein control circuit switch is opened by presence of fault output signal, thus isolating load circuit from supply circuit. Preferably fault processing circuit and control circuit are optically linked, such that when fault is detected, control circuit switch is opened by optical fault output signal, thus isolating load circuit from the supply circuit. Circuit interrupter may couple another circuit interrupter via power distribution control unit, optionally manageable remotely via automated control interface.

A current detecting device includes a sense resistor through which a sense current corresponding to a consumption current supplied to a load flows, and an A/D converter configured to perform A/D conversion on a voltage drop generated by the sense current flowing through the sense resistor to detect the consumption current. A resistance value of the sense resistor is variably provided.

A circuit breaker distribution system is configured to provide selective coordination. The system comprises a solid-state switch disposed as a main or upstream breaker and a switch with an over current protection disposed as a branch or downstream breaker. The solid-state switch comprises a microcontroller to: allow repeated pulses of current through to the branch or downstream breaker in an event of an overload or short circuit, choose a maximum current limit for the solid-state switch as a “chop level” such that the chop level is chosen higher than a rated current of the solid-state circuit breaker but low enough that the solid-state switch is not damaged from repeated pulses over a period of time needed to switch OFF the branch or downstream breaker, and add a pulse interval which is optimized to a system voltage waveform in that chopped pulses tend to be longer and more effective for de-latching the branch or downstream breaker when they occur in vicinity of a zero crossing of the system voltage waveform and chopped pulses are shorter and less effective near peaks of the system voltage waveform.

An uninterruptible power supply (UPS) for a three-phase alternating current network, in particular a medium-voltage network, includes an energy storage system, a switch, an LC resonant circuit, which is a series circuit of an inductance and a capacitance, and a control unit for controlling the switch. The switch and the LC resonant circuit are connected in series, and the series circuit of the switch and the LC resonant is arranged between a network feed and the energy storage system which is connected to a load. There is also described a method for operating such a UPS and a corresponding computer program.