A differential protection method for monitoring a line of a power grid. Current phasor measured values are captured at the ends of the line and transmitted to an evaluation device which is used to form a differential current value with current phasor measured values temporally allocated to one another. Time delay information indicating the time delay between local timers of the measuring devices is used for the temporal allocation of the current phasor measured values captured at different ends, and a fault signal indicating a fault affecting the line is generated if the differential current value exceeds a predefined threshold value. The reliability of the time synchronization is further increased by forming a quotient of the current phasor measured values to form an asymmetry variable, that is used to check a transit time difference of messages transmitted via the communication connection in different directions.

A device for detecting an arc fault in a polyphase electrical installation comprises: a high-frequency measuring system coupled to at least two electrical phase lines of the installation, said measuring system being configured to extract a first signal representative of high-frequency components of electrical currents flowing through said phase lines; a plurality of low-frequency measuring systems, each coupled to one electrical phase line of the installation, each being configured to acquire a second signal representative of the alternating line current flowing through the corresponding phase line; and a data-processing module programmed to detect an arc fault on the basis of the second signals and of the first signal.

A device for detecting an arc fault in a polyphase electrical installation comprises: a high-frequency measuring system coupled to at least two electrical phase lines of the installation, said measuring system being configured to extract a first signal representative of high-frequency components of electrical currents flowing through said phase lines; a plurality of low-frequency measuring systems, each coupled to one electrical phase line of the installation, each being configured to acquire a second signal representative of the alternating line current flowing through the corresponding phase line; and a data-processing module programmed to detect an arc fault on the basis of the second signals and of the first signal.

Systems and methods to isolate faults and restore power are described herein. For example, an intelligent electronic device (IED) may receive a blocking signal indicating a fault is detected on a power line. The IED may obtain one or more current measurements of the power line. The IED may determine that a fault is not present on the power line at the IED based on the one or more current measurements. The IED may trip a first current interruption device of the IED The IED may send a close permissive signal to another IED indicating that the other IED is permitted to permitted to close an open current interruption device of the other IED to restore power to one or more loads.

In order to ensure safe operation of a multi-phase system, even a system including a plurality of phases, a number of phase groups is provided, which comprises some of the phases, wherein phase currents of the number of phase groups are merged in a group node to form a group sum current and a group sum current measurement value of the group sum current is captured. The current measurement values belonging to the number of phase groups are summed up to form a group sum and the group sum is compared with the group sum current measurement value to validate the phase currents of the phases in order to ensure safe operation.

A USB Type-C/Power Delivery controller chip includes a first pin for receiving a first voltage, a second pin for receiving a second voltage, and a third pin for coupling to the CC pin of a USB connector. The USB controller chip includes a VCONN power supply circuit having a blocking field effect transistor (BFET) coupled in series with a hot-swap field FET (HSFET) between the first and third pins, and first and second Zener diodes coupled anode-to-anode between the HSFET's source and gate. A cable detection circuit includes a BFET coupled between the second and third pins, and a Zener diode coupled between the BFET's gate and a lower rail. A power delivery physical layer circuit includes a receiver and a transmitter, each coupled to the third pin through a respective BFET, the respective BFETs each having a Zener diode coupled between respective gates and the lower rail.

A USB Type-C/Power Delivery controller chip includes a first pin for receiving a first voltage, a second pin for receiving a second voltage, and a third pin for coupling to the CC pin of a USB connector. The USB controller chip includes a VCONN power supply circuit having a blocking field effect transistor (BFET) coupled in series with a hot-swap field FET (HSFET) between the first and third pins, and first and second Zener diodes coupled anode-to-anode between the HSFET's source and gate. A cable detection circuit includes a BFET coupled between the second and third pins, and a Zener diode coupled between the BFET's gate and a lower rail. A power delivery physical layer circuit includes a receiver and a transmitter, each coupled to the third pin through a respective BFET, the respective BFETs each having a Zener diode coupled between respective gates and the lower rail.

The invention disclosure relates to a space-limited protection module with at least two overvoltage protection elements in parallel current branches, where the protection module includes a local multistage indicator for indicating at least one operating state, a warning state and a defect state, and where the parallel switched overvoltage protection elements are arranged on a circuit board in electrical connection to conductor tracks of the circuit board and attached in a thermally softenable manner.

The invention disclosure relates to a space-limited protection module with at least two overvoltage protection elements in parallel current branches, where the protection module includes a local multistage indicator for indicating at least one operating state, a warning state and a defect state, and where the parallel switched overvoltage protection elements are arranged on a circuit board in electrical connection to conductor tracks of the circuit board and attached in a thermally softenable manner.

A method involves a circuit interrupter installation having a circuit interrupter with a plurality of poles and an ETU electrically connected with a neutral current sensor situated in proximity to a neutral conductor. The method includes determining that a plurality of fundamental frequency phase current vectors, when summed, are substantially equal to a fundamental frequency neutral current vector, and/or that a plurality of triplen odd-numbered harmonic phase current vectors, when summed, are substantially equal to a triplen odd-numbered harmonic neutral current vector. Responsive to the determining, the method includes outputting a notification which represents a possibility that a neutral current detection apparatus is mis-wired, and/or employing with the ETU a reverse vector that is an opposite of the fundamental frequency neutral current vector in the ongoing monitoring for an event that would trigger the movement of the circuit interrupter from the ON condition to the OFF or TRIPPED condition.