A clocked buck-boost converter includes two switch elements and an inductor and via which an input voltage is converted into a regulated output voltage, wherein a first switch element or buck converter switch element is clocked using a first control signal, and a second switch element or boost converter switch element is clocked using a second control signal, where the first and second control signals are derived from a regulator manipulated variable from a regulating unit, first and second manipulated variables are generated for the first and second control signals, the regulator manipulated variable is amplified, an offset value is derived, and the two manipulated variables are then compared with a sawtooth signal and the two switch elements of the buck-boost converter are actuated or clocked in a corresponding manner to generate the first or second control signal.

A converter comprises a housing having a mounting structure for mounting the converter to a DIN rail. A converter circuit is disposed within the housing and comprises one or several wide-bandgap semiconductor based active switching element(s). The converter circuit is adapted to perform a total harmonic voltage distortion measurement and to perform a control function based thereon.

A supply node receives supply voltage and an output node provides a regulated output voltage to a load. A switching transistor is coupled between the supply and output nodes. The switching transistor is controlled by a drive signal generated by a control circuit to control switching activity. The control circuit includes circuitry to sense a feedback voltage indicative of the regulated output voltage and a comparator generating a comparison logic signal dependent on a comparison of the feedback voltage to a reference. A logic circuit generates a skip signal in response to the comparison logic signal. A counter generates a termination signal. Signal processing circuitry controls the switching activity by asserting the drive signal as a function of the skip signal and the termination signal.

An electronic device includes a plurality of coils, power conversion circuits, demodulation switches, and a processor. The power conversion circuits convert DC power into AC power, and output the AC power to the plurality of coils, respectively. The demodulation switches selectively connect the plurality of coils to ground. The processor selects at least one coil from among the plurality of coils, and controls an on/off state of the demodulation switches to connect or disconnect at least one remaining coil except for the selected at least one coil among the plurality of coils to the ground. The processor controls the power conversion circuits to output the AC power to the selected at least one coil and demodulates a signal of the selected at least one coil to identify information from an external electronic device disposed adjacent to a selected at least one coil based on the demodulation.

A synchronous full-bridge rectifier circuit includes: a first high-side transistor, a first low-side transistor, a second high-side transistor and a second low-side transistor which are configured to generate a DC power source from an AC power source, wherein the first high-side transistor and the first low-side transistor are coupled to a live wire of the AC power source, and the second high-side transistor and the second low-side transistor are coupled to a neutral wire of the AC power source; a first detection transistor, coupled to the live wire and configured to generate a first detection signal; and a second detection transistor, coupled to the neutral wire configured to generate a second detection signal; wherein the first low-side transistor is turned on after the body-diode of the first low-side transistor is turned on; the second low-side transistor is turned on after the body-diode of the second low-side transistor is turned on.

A switched power circuit to control a common-mode signal. The switched power circuit includes a first switch and a second switch configured to generate switch mode voltage between a first node and a second node. The switched power circuit further includes a feedback circuit that is configured to detect common-mode voltage generated between the first node and the second node by a first signal generated by the first switch and a second signal generated by the second switch, and incrementally adjust a timing parameter of the first signal to adjust the common-mode signal.

A method for controlling a power converter, which in particular has partial power converters connected in parallel, is provided. The method includes determining a nominal voltage for the power converter; and dividing an output voltage for the power converter into a number of, in particular equal, voltage ranges. The voltage ranges are limited by a discrete upper voltage limit and a discrete lower voltage limit and the voltage ranges can be adjusted by switching the power converter, in particular the partial power converters. The method includes allocating the nominal voltage a voltage range with a discrete upper and lower voltage limits; allocating a first switch setting to the lower voltage limit; allocating a second switch setting to the upper voltage limit; and switching between the first switch setting and the second switch setting so that the power converter generates an actual voltage corresponding to the nominal voltage.

Embodiments of a power converter are disclosed. In an embodiment, the power converter comprises a power factor correction (PFC) stage circuit, an emulation circuit and a controller. The PFC stage circuit is configured to produce an output signal on an output terminal. The PFC stage circuit includes an inductor coupled between a rectifier and the output terminal and a switch coupled to the inductor. The emulation circuit is connected to the PFC stage circuit to generate an emulated current that corresponds to current through the inductor of the PFC stage circuit. The emulated current is generated based on a voltage signal at a node between the inductor and the output terminal and a sensed current at a sense resistor connected to the rectifier. The controller is connected to the emulation circuit to receive the emulated current and generate a control signal for the switch of the PFC stage circuit based on the emulated current.

In some examples, a circuit includes a resistor network, a filter, a current generator, and a capacitor. The resistor network has a resistor network output and is adapted to be coupled between a switch terminal of a power converter (104) and a ground terminal. The filter has a filter input and a filter output, the filter input coupled to the resistor network output. The current generator has a current generator output and first and second current generator inputs, the first current generator input configured to receive an input voltage and the second current generator input coupled to the filter output. The capacitor is coupled between the current generator output and the ground terminal.

A method for operating a DC-DC voltage converter apparatus having a plurality of DC-DC voltage converter units connected in parallel in an electrical network is provided. The DC-DC voltage converter units are operated in a master/slave configuration based on current mode control in order to set a desired output voltage. Here, a reference voltage, to which the output voltage is intended to be adjusted, for the slave converters is determined by way of a preconditioning function according to a predetermined calculation specification from a master reference voltage prescribed by the master converter. Stable control can therefore be ensured even in the case of fluctuating loading at the respective DC-DC voltage converter units.