H02M1/38

System and method for operating multi-level power converter using a multi-state deadtime

A method for operating a multi-level bridge power converter of an electrical power system connected to a power grid includes providing a plurality of switching devices of the power converter in one of a neutral point clamped topology or an active neutral point clamped topology, the plurality of switching devices including a first group and a second group of switching devices. The method also includes providing a multi-state deadtime for the first and second groups of switching devices that changes based on different state transitions of the power converter. Further, the method includes operating the first and second groups of switching devices according to the multi-state deadtime to allow the first group to switch differently than the second group during the different state transitions, thereby decreasing voltage overshoots on the first group during one or more of the different state transitions and providing safe transition between commutation states of the power converter.

System and method for operating multi-level power converter using a multi-state deadtime

A method for operating a multi-level bridge power converter of an electrical power system connected to a power grid includes providing a plurality of switching devices of the power converter in one of a neutral point clamped topology or an active neutral point clamped topology, the plurality of switching devices including a first group and a second group of switching devices. The method also includes providing a multi-state deadtime for the first and second groups of switching devices that changes based on different state transitions of the power converter. Further, the method includes operating the first and second groups of switching devices according to the multi-state deadtime to allow the first group to switch differently than the second group during the different state transitions, thereby decreasing voltage overshoots on the first group during one or more of the different state transitions and providing safe transition between commutation states of the power converter.

DIODE CONDUCTION SENSOR

Methods and apparatus for a body diode conduction sensor configured for coupling to a switching element. In embodiments, the sensor comprises first and second voltage divider networks coupled to a voltage source and a diode coupled to the switching element and to the first voltage divider network, wherein the diode is conductive at times corresponding to body diode conduction of the switching element decreasing the DC average voltage at the output node of the first voltage divider network. A differential output voltage can be coupled to the first and second voltage divider networks with an output signal corresponding to a time of the body diode conduction of the switching element.

DIODE CONDUCTION SENSOR

Methods and apparatus for a body diode conduction sensor configured for coupling to a switching element. In embodiments, the sensor comprises first and second voltage divider networks coupled to a voltage source and a diode coupled to the switching element and to the first voltage divider network, wherein the diode is conductive at times corresponding to body diode conduction of the switching element decreasing the DC average voltage at the output node of the first voltage divider network. A differential output voltage can be coupled to the first and second voltage divider networks with an output signal corresponding to a time of the body diode conduction of the switching element.

CONVERTER, CONVERTER CONTROL METHOD, AND POWER ADAPTER
20230006544 · 2023-01-05 ·

The converter includes: an input direct current (DC) power supply, a main power transistor, an auxiliary power transistor, a first capacitor, a transformer, and a controller. The first capacitor is connected in series to the transformer to form a series circuit. The series circuit is connected in parallel to the auxiliary power transistor. A source of the main power transistor is connected to a drain of the auxiliary power transistor. A source of the auxiliary power transistor is connected to another electrode of the input DC power supply. An input negative electrode of the input DC power supply is grounded. The controller is configured to: monitor a value of a current on the transformer to obtain a quantity of times that the value of the current on the transformer reaches a specified current threshold.

Control system with delayed protection for a three-level inverter

A microcontroller unit for controlling a three-level inverter including delayed fault protection is provided. The microcontroller unit includes an input port configured to receive a trip signal from a fault detection module, and a plurality of EPWM modules, each configured to control a power switch within the three-level inverter. The microcontroller unit includes an auxiliary EPWM module configured to receive the trip signal and produce a delayed trip signal, and processing circuitry coupled with the input port, the plurality of EPWM modules, and the auxiliary EPWM module. The processing circuitry is configured to, in response to activation of the trip signal, direct one of the plurality of EPWM modules to shut off its corresponding power switch upon activation of the trip signal, and to direct a different one of the plurality of EPWM modules to shut off its corresponding power switch upon activation of the delayed trip signal.

Multi-level inverter clamping modulation method and apparatus, and inverter

Embodiments of the present application disclose a multi-level inverter clamping modulation method and apparatus, and an inverter. Switching elements of an inverter are controlled when an output voltage of the inverter crosses zero, and switching elements in each inverter bridge arm of an active clamp multi-level inverter include an internal tube, an external tube, and a clamping tube. The internal tube and the external tube are connected in series between a positive bus and a negative bus, the clamping tube is connected between a common terminal of the internal tube and the external tube and a bus, the internal tube is a low-frequency switching element, and the external tube and the clamping tube are high-frequency switching elements.

Multi-level inverter clamping modulation method and apparatus, and inverter

Embodiments of the present application disclose a multi-level inverter clamping modulation method and apparatus, and an inverter. Switching elements of an inverter are controlled when an output voltage of the inverter crosses zero, and switching elements in each inverter bridge arm of an active clamp multi-level inverter include an internal tube, an external tube, and a clamping tube. The internal tube and the external tube are connected in series between a positive bus and a negative bus, the clamping tube is connected between a common terminal of the internal tube and the external tube and a bus, the internal tube is a low-frequency switching element, and the external tube and the clamping tube are high-frequency switching elements.

SWITCHING CIRCUIT
20230023250 · 2023-01-26 ·

A switching controller generates control pulses for specifying on/off states of a first transistor and a second transistor. One end of a capacitor is coupled to a switching node. A constant voltage is applied to the other end of the capacitor via a rectifier element. A dead time controller controls a delay time between adjacent edges of the first control pulse and the second control pulse according to a sensing voltage across both ends of the capacitor.

Synchronous converter for use with reverse current protection diode

A converter to convert an input voltage into a regulated output current for supplying a load includes a reverse current protection diode having an anode coupled to the input voltage and a cathode, an energy storage element coupled to the cathode of the reverse current protection diode, a high side transistor coupled to the energy storage element and responsive to a high side control signal, and a low side transistor coupled to the energy storage element and responsive to a low side control signal. A controller is configured to generate the high side control signal and the low side control signal such that the low side transistor is enabled and the high side transistor is disabled during a pre-regulation interval.