A period from when switching elements S1, S4 at first diagonal positions in a full-bridge inverter are turned off at the same time to when switching elements S2, S3 at second diagonal positions are turned on at the same time, is defined as T1, and a period from when the switching elements S2, S3 at the second diagonal positions are turned off at the same time to when the switching elements S1, S4 at the first diagonal positions are turned on at the same time, is defined as T2. With a total length of T1 and T2 set to be constant, the lengths of T1 and T2 are controlled to be changed every switching cycle.

A period from when switching elements S1, S4 at first diagonal positions in a full-bridge inverter are turned off at the same time to when switching elements S2, S3 at second diagonal positions are turned on at the same time, is defined as T1, and a period from when the switching elements S2, S3 at the second diagonal positions are turned off at the same time to when the switching elements S1, S4 at the first diagonal positions are turned on at the same time, is defined as T2. With a total length of T1 and T2 set to be constant, the lengths of T1 and T2 are controlled to be changed every switching cycle.

A switching control circuit for controlling an LLC converter that includes a first switching device, a first free-wheeling diode connected in parallel with the first switching device, a second switching device connected in series with the first switching device and the first free-wheeling diode, and a second free-wheeling diode connected in parallel with the second switching device. The switching control circuit controls switching of the first and second switching devices. The switching control circuit includes a determination circuit determining whether an operation mode of the LLC converter is a first mode or a second mode based on the resonant current of the LLC converter, and a drive signal output circuit outputting first and second drive signals for respectively switching the first and second switching devices based on the determined operation mode, to thereby prevent a shoot-through current from flowing through the first switching device or the second switching device.

An automatic dead zone time optimization system in a primary-side regulation flyback power supply continuous conduction mode (CCM), including a closed loop formed by a control system, including a single output digital to analog converter (DAC) midpoint sampling module, a digital control module, a current detection module, a dead zone time calculation module and a pulse-width modulation (PWM) driving module, and a controlled synchronous rectification primary-side regulation flyback converter. A primary-side current is sampled using a DAC Sampling mechanism to calculate a secondary-side average current, so as to obtain a primary-side average current and a secondary-side average current, in the case of CCM. A secondary-side current is input into the dead zone time calculation module to obtain a reasonable dead zone time; and the PWM driving module is jointly controlled by a primary-side regulation loop and the obtained dead zone time.

An automatic dead zone time optimization system in a primary-side regulation flyback power supply continuous conduction mode (CCM), including a closed loop formed by a control system, including a single output digital to analog converter (DAC) midpoint sampling module, a digital control module, a current detection module, a dead zone time calculation module and a pulse-width modulation (PWM) driving module, and a controlled synchronous rectification primary-side regulation flyback converter. A primary-side current is sampled using a DAC Sampling mechanism to calculate a secondary-side average current, so as to obtain a primary-side average current and a secondary-side average current, in the case of CCM. A secondary-side current is input into the dead zone time calculation module to obtain a reasonable dead zone time; and the PWM driving module is jointly controlled by a primary-side regulation loop and the obtained dead zone time.

A power converting device includes upper-arm and lower-arm gate drive circuits which respectively drive upper-arm and lower-arm semiconductor switching elements and which respectively include upper-arm and lower-arm time point detection circuits for detecting time points at which voltages between main terminals of the upper-arm and lower-arm semiconductor switching elements have crossed respective reference voltages, and a controller including a calculator which calculates a change time point of an inverter output voltage and a PWM command pulse generator which generates, on the basis of information about the time point calculated by the calculator, a PWM command pulse to be given to the upper-arm gate drive circuit and the lower-arm gate drive circuit.

A power supply has a transformer, a rectifier switch, a secondary-side controller and two diodes. The transformer includes a primary winding, a secondary winding, and a detection winding, inductively coupling to one another. The rectifier switch is connected in series with the secondary winding between two output power lines. The secondary-side controller is electrically coupled to two ends of the detection winding, for controlling the rectifier switch in response to two terminal signals at the two ends respectively. The two diodes are back-to-back electrically connected in series between the two ends, and a joint connecting the two diodes is electrically connected to one of the two output power lines.

A power supply has a transformer, a rectifier switch, a secondary-side controller and two diodes. The transformer includes a primary winding, a secondary winding, and a detection winding, inductively coupling to one another. The rectifier switch is connected in series with the secondary winding between two output power lines. The secondary-side controller is electrically coupled to two ends of the detection winding, for controlling the rectifier switch in response to two terminal signals at the two ends respectively. The two diodes are back-to-back electrically connected in series between the two ends, and a joint connecting the two diodes is electrically connected to one of the two output power lines.

A bridge circuit includes a first leg and a second leg arranged in parallel between the first node and the third node. A clamp circuit includes a third leg including a first bidirectional switch disposed between a fourth node that is a midpoint of the first leg and a fifth node that is a midpoint of the second leg. A first reactor is connected with the fourth node and a sixth node, and a second reactor is connected with a fifth node and a seventh node. A fourth leg includes a second bidirectional switch disposed between the second node and the fourth node or the fifth node.

In an embodiment, a method for operating an ACF converter includes: turning on a low-side transistor that is coupled between a primary winding of a transformer and a reference terminal to cause a forward current to enter the primary winding, turning off the low-side transistor; after turning off the low-side transistor, turning on a high-side transistor that is coupled between the primary winding and a clamp capacitor to cause a reverse current to flow through the primary winding; and after turning on the high-side transistor, when an overcurrent of the reverse current is not detected, keeping the high-side transistor on for a first period of time, and turning off the high-side transistor after the first period of time, and when the overcurrent of the reverse current is detected, turning off the high-side transistor without keeping the high-side transistor on for the first period of time.