An electronic circuit board includes a substrate having a multilayer structure including a ground layer, has at least one configuration in which, in a ground layer closest to a signal terminal of an oscillator, a region overlapping a signal terminal in a plan view is a non-forming region of a ground electrode, in a ground layer closest to a first wiring connecting the signal terminal of the oscillator and an input portion of an amplifier, a region overlapping the first wiring in the plan view is a non-forming region of a ground electrode, and in a ground layer closest to a second wiring connecting the signal terminal of the oscillator and an output portion of the amplifier, a region overlapping the second wiring in the plan view is a non-forming region of a ground electrode.

An electronic component package includes: a first side surface terminal provided on a first side surface; a first external connection terminal provided on a mounting surface (rear surface); a first recess electrode provided in a first recess and electrically connected with the first external connection terminal; and a first branch wiring disposed on a front surface of a middle plate and including a first end exposed in the first side surface between the first side surface terminal and the first recess electrode. The relation: L11>L12 is satisfied, where L11 is the distance between the first end and the first recess electrode and L12 is the distance between the first end and the first side surface terminal.

An electronic component package includes: a first side surface terminal provided on a first side surface; a first external connection terminal provided on a mounting surface (rear surface); a first recess electrode provided in a first recess and electrically connected with the first external connection terminal; and a first branch wiring disposed on a front surface of a middle plate and including a first end exposed in the first side surface between the first side surface terminal and the first recess electrode. The relation: L11>L12 is satisfied, where L11 is the distance between the first end and the first recess electrode and L12 is the distance between the first end and the first side surface terminal.

A crystal oscillator circuit comprises a crystal; oscillator circuitry for generating a crystal oscillation signal at an oscillation frequency; and a kick-start circuit for injecting pulses into the crystal during a start-up period. The oscillator circuitry comprises a differential pair of transistors and can operate in an oscillating mode or a start-up mode. In the oscillating mode, the differential pair of transistors is cross-coupled so that a gate terminal of one transistor is coupled to a drain terminal of the other transistor, and vice versa, and the drain terminals are coupled to the crystal to generate the crystal oscillation signal. In the start-up mode, the kick-start circuit drives the gate terminals of the transistors with said pulses. This crystal oscillator circuit has a decreased start-up time compared to prior art solutions and a reduced influence of parasitic oscillations.

A crystal oscillator circuit comprises a crystal; oscillator circuitry for generating a crystal oscillation signal at an oscillation frequency; and a kick-start circuit for injecting pulses into the crystal during a start-up period. The oscillator circuitry comprises a differential pair of transistors and can operate in an oscillating mode or a start-up mode. In the oscillating mode, the differential pair of transistors is cross-coupled so that a gate terminal of one transistor is coupled to a drain terminal of the other transistor, and vice versa, and the drain terminals are coupled to the crystal to generate the crystal oscillation signal. In the start-up mode, the kick-start circuit drives the gate terminals of the transistors with said pulses. This crystal oscillator circuit has a decreased start-up time compared to prior art solutions and a reduced influence of parasitic oscillations.

A periodic output generator has a first clock source coupled to a first counter and a second clock source with a frequency greater than the first clock source, the second clock source coupled to a second counter, the first clock source operating continuously, the second clock source enabled when the first clock source reaches a count C1. The second clock source generates an output when a count C2 is reached, and the counters are reset and the process repeats. In another example, a timestamp generator has a high speed clock and a real time clock operative on a low speed clock. The timestamp generator receives an external event, turns on the high speed clock generator and counts high speed clock cycles C until the arrival of the next time stamp, and computes an event timestamp as the next timestamp less c/f, less the startup time of the high speed clock.

A crystal oscillator circuit comprises a crystal; oscillator circuitry for generating a crystal oscillation signal at an oscillation frequency; and a kick-start circuit for injecting pulses into the crystal during a start-up period. The oscillator circuitry comprises a differential pair of transistors and can operate in an oscillating mode or a start-up mode. In the oscillating mode, the differential pair of transistors are cross-coupled so that a gate terminal of one transistor is coupled to a drain terminal of the other transistor, and vice versa, and the drain terminals are coupled to the crystal to generate the crystal oscillation signal. In the start-up mode, the kick-start circuit drives the gate terminals of the transistors with said pulses. This crystal oscillator circuit has a decreased start-up time compared to prior art solutions and a reduced influence of parasitic oscillations.

A crystal oscillator circuit comprises a crystal; oscillator circuitry for generating a crystal oscillation signal at an oscillation frequency; and a kick-start circuit for injecting pulses into the crystal during a start-up period. The oscillator circuitry comprises a differential pair of transistors and can operate in an oscillating mode or a start-up mode. In the oscillating mode, the differential pair of transistors are cross-coupled so that a gate terminal of one transistor is coupled to a drain terminal of the other transistor, and vice versa, and the drain terminals are coupled to the crystal to generate the crystal oscillation signal. In the start-up mode, the kick-start circuit drives the gate terminals of the transistors with said pulses. This crystal oscillator circuit has a decreased start-up time compared to prior art solutions and a reduced influence of parasitic oscillations.

In some embodiments, there is provided an apparatus including a common bus and a plurality of oscillatrode circuits coupled to the common bus, the plurality of oscillatrode circuits including a first oscillatrode circuit outputting a first frequency tone when a first input voltage is detected by the first oscillatrode circuit and a second oscillatrode circuit outputting a second frequency tone when a second input voltage is detected by the second oscillatrode circuit, wherein common bus carries the first frequency tone and the second frequency tone at different frequencies in a frequency division multiplex signal. Related systems, methods, and articles of manufacture are also disclosed.

In some embodiments, there is provided an apparatus including a common bus and a plurality of oscillatrode circuits coupled to the common bus, the plurality of oscillatrode circuits including a first oscillatrode circuit outputting a first frequency tone when a first input voltage is detected by the first oscillatrode circuit and a second oscillatrode circuit outputting a second frequency tone when a second input voltage is detected by the second oscillatrode circuit, wherein common bus carries the first frequency tone and the second frequency tone at different frequencies in a frequency division multiplex signal. Related systems, methods, and articles of manufacture are also disclosed.