A wide range differential current switching circuit can operate across a wide range of input currents and across a broad range of frequencies. A first differential current source can include a first transistor and a second transistor. The first transistor receives a switching signal and provides an output current and at output node. The second transistor receives an inverted switching signal, the first transistor and the second transistor coupled to each other at a tail node. A current source provides an input current to the tail node. A third transistor can provide a boost current to the tail node while the first transistor is off.

A wide range differential current switching circuit can operate across a wide range of input currents and across a broad range of frequencies. A first differential current source can include a first transistor and a second transistor. The first transistor receives a switching signal and provides an output current and at output node. The second transistor receives an inverted switching signal, the first transistor and the second transistor coupled to each other at a tail node. A current source provides an input current to the tail node. A third transistor can provide a boost current to the tail node while the first transistor is off.

A wide range differential current switching circuit can operate across a wide range of input currents and across a broad range of frequencies. A first differential current source can include a first transistor and a second transistor. The first transistor receives a switching signal and provides an output current and at output node. The second transistor receives an inverted switching signal, the first transistor and the second transistor coupled to each other at a tail node. A current source provides an input current to the tail node. A third transistor can provide a boost current to the tail node while the first transistor is off.

According to an embodiment of the inventive concept, an up-down converter includes a first mixer configured to convert an input radio frequency (RF) signal into an intermediate frequency (IF) signal using a first local signal; an IF filter configured to filter the IF signal converted by the first mixer; a second mixer configured to convert the IF signal, which has been filtered by the IF filter, into an output RF signal using a second local signal; and a local oscillator configured to control a frequency of the first local signal and the second local signal based on a frequency of the input RF signal.

According to an embodiment of the inventive concept, an up-down converter includes a first mixer configured to convert an input radio frequency (RF) signal into an intermediate frequency (IF) signal using a first local signal; an IF filter configured to filter the IF signal converted by the first mixer; a second mixer configured to convert the IF signal, which has been filtered by the IF filter, into an output RF signal using a second local signal; and a local oscillator configured to control a frequency of the first local signal and the second local signal based on a frequency of the input RF signal.

The mixer-first topology of receivers do not include low-noise amplifiers (LNA) preceding the mixer. The Mixer-First topology of radio receivers utilizes a direct-conversion quadrature mixer to down convert an RF signal to baseband, where a Hilbert Transform filter is used for sideband selection. When a switching mixer is used, the mixer-first receiver is capable of extremely high dynamic range and linearity. The downfall of the mixer-first topology is poor out-of-band signal rejection. A mixer-first receiver is described which achieves third-harmonic rejection without bandpass filtering proceeding the mixer.

Described are an amplifier circuits, systems, and methods for amplifying a plurality of sinusoid signals having a relative phase difference to each other. The amplifier circuit comprises a first sequence of at least three transistor amplifiers, wherein a first terminal of each transistor amplifier of the first sequence is configured to receive one respective signal of the plurality sinusoid signals. The amplifier further comprises a second sequence of at least three transistor amplifiers. A second terminal of each transistor amplifier of the second sequence is connected to a third terminal of one respective transistor amplifier of the first sequence. A first terminal of each transistor amplifier of the second sequence is connected to the third terminal of a next transistor amplifier of the second sequence. The first terminal of a last transistor amplifier is connected to the third terminal of a first transistor amplifier.

Described are an amplifier circuits, systems, and methods for amplifying a plurality of sinusoid signals having a relative phase difference to each other. The amplifier circuit comprises a first sequence of at least three transistor amplifiers, wherein a first terminal of each transistor amplifier of the first sequence is configured to receive one respective signal of the plurality sinusoid signals. The amplifier further comprises a second sequence of at least three transistor amplifiers. A second terminal of each transistor amplifier of the second sequence is connected to a third terminal of one respective transistor amplifier of the first sequence. A first terminal of each transistor amplifier of the second sequence is connected to the third terminal of a next transistor amplifier of the second sequence. The first terminal of a last transistor amplifier is connected to the third terminal of a first transistor amplifier.

An apparatus and method. The method includes filtering an output of an in-phase (I-mixer); filtering an output of a quadrature-mixer (Q-mixer); converting an output of a first low pass filter (LPF); converting an output of a second LPF; buffering an output of a first analog-to-digital converter (ADC); buffering an output of a second ADC; buffering a transmitter signal; generating a reference signal from an output of a transmitter (TX) data capture buffer; removing DC from the reference signal; and adaptively tuning an I-mixer digital-to-analog (DAC) code and a Q-mixer DAC code from an output of a first receiver (RX) data capture buffer, an output of a second RX data capture buffer, an output of a DC removal unit, and a predetermined step size for each of the I-mixer DAC code and the Q-mixer DAC code.

Methods and circuitry for calibrating inductive-capacitive resonant circuits are disclosed. An example of the circuitry includes an inductive-capacitive (L-C) resonant circuit operable to receive signals in response to induced electromagnetic signals transmitted on a carrier frequency. A demodulator has a signal source and is operable to demodulate signals generated by the L-C resonant circuit. Switching circuitry is operable to inject signals generated by the signal source into the L-C resonant circuit during a calibration mode. The calibration mode is for adjusting the capacitance in the L-C resonant circuit to tune the L-C resonant circuit to the carrier frequency.