Some embodiments herein describe a radio frequency power semiconductor device that include a first non-linear filter network for compensating for lower frequency noise of a power amplifier. The first non-linear filter network can include a plurality of infinite impulse response filters and corresponding corrective elements to correct for a non-linear portion of the power amplifier. The radio frequency power semiconductor device can further include a second non-linear filter network for compensating for broadband distortion. The second non-linear filter network can be connected in parallel to the first non-linear filter network. The broadband distortion can include digital predistortion and the narrowband distortion can include charge trapping effects. The first non-linear filter network can comprise Laguerre filters. The second non-linear filter network can comprise general memory polynomial filters.

Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores in a particular gain mode to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a low noise figure amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity. The disclosed signal amplifiers can switch between a first active core and a second active core for a single or particular gain mode to achieve desired signal characteristics during different time periods.

A compensation circuit, chip, method and device, a storage medium, and an electronic device are disclosed. The compensation circuit may include an analog module (102) including an input node (1022) and an output node (1024), wherein the input node (1022) is configured to receive an input signal and the output node (1024) is configured to output an output signal; and a linearity compensation module (104) including a plurality of transconductance units (1042), where the plurality of transconductance units (1042) are configured to acquire a first configuration signal and configure a combination of the plurality of transconductance units (1042) based on the first configuration signal to provide a compensation signal to the output node (1024), and the first configuration signal is configured to indicate a signal at any position in the analog module (102).

A method for performing predictive maintenance of an amplifier module is described. At least one parameter of at least one amplifier module is acquired via a measurement data acquisition unit. The at least one parameter acquired is analyzed via a measurement data analyzing unit so as to predict the probability and/or time of default of the at least one amplifier module. Further, a system is described.

An embodiment of a dual-path amplifier includes a power splitter connected to first and second power amplifiers respectively connected to first and second transmission lines connected to a power combiner having a phase-offset deficit at the second harmonic frequency 2f0, where the first and second transmission lines are designed to provide a complementary phase offset at 2f0 substantially equal to the phase-offset deficit such that the two amplified signals will be combined at the power converter with a total phase offset at 2f0 of about 180 degrees in order to reduce harmonic distortion in the amplified output signal, without substantially diminishing the output power at the fundamental frequency f0. In certain PCB-based implementations, the transmission lines include metal traces and lumped elements providing different impedance transformations that achieve the complementary phase offset, where the metal traces may have significantly different physical and electrical characteristics.

An embodiment of a dual-path amplifier includes a power splitter connected to first and second power amplifiers respectively connected to first and second transmission lines connected to a power combiner having a phase-offset deficit at the second harmonic frequency 2f0, where the first and second transmission lines are designed to provide a complementary phase offset at 2f0 substantially equal to the phase-offset deficit such that the two amplified signals will be combined at the power converter with a total phase offset at 2f0 of about 180 degrees in order to reduce harmonic distortion in the amplified output signal, without substantially diminishing the output power at the fundamental frequency f0. In certain PCB-based implementations, the transmission lines include metal traces and lumped elements providing different impedance transformations that achieve the complementary phase offset, where the metal traces may have significantly different physical and electrical characteristics.

A power amplifier includes a transistor, a temperature sensor and a filter. The transistor is used to receive a bias signal and amplify a radio frequency (RF) signal. The temperature sensor is arranged in proximity to the transistor, and is used to detect a temperature of the transistor to provide a voltage signal at a control node accordingly. The filter is coupled to the temperature sensor and is used to filter the voltage signal to generate a filtered voltage. The bias signal is adjusted according to the filtered voltage.

A power amplifier includes a transistor, a temperature sensor and a filter. The transistor is used to receive a bias signal and amplify a radio frequency (RF) signal. The temperature sensor is arranged in proximity to the transistor, and is used to detect a temperature of the transistor to provide a voltage signal at a control node accordingly. The filter is coupled to the temperature sensor and is used to filter the voltage signal to generate a filtered voltage. The bias signal is adjusted according to the filtered voltage.

Aspects relate to signaling relating to a non-linearity model for power amplifier circuitry of a transmitting device. The power amplifier circuitry may apply digital pre-distortion (DPD) to a signal prior to amplification and transmission of the signal. A receiving device may apply digital post-distortion (DPoD) to a signal received from the transmitting device where the DPoD is based on the non-linearity model. The transmitting device may send to the receiving device non-linearity parameters for the non-linearity model.

A low noise amplifier topology can achieve very low noise figure by applying multiple magnetic coupling between gate matching inductors and source degeneration inductor of a field effect transistor. The resulting low noise amplifier has smaller inductors, which can have lower thermal noise contribution, and can maintain good gain and linearity performance. For example, a low noise amplifier includes a first inductor to receive an input; a second inductor coupled to the first inductor in series; a first field effect transistor device whose gate receives a signal from the second inductor; and a third inductor coupled to a source of the first field effect transistor device, where the third inductor is magnetically positively coupled to the first inductor and the second inductor.