Patent classifications
H03F3/30
Slew boost circuit for an operational amplifier
A differential input stage of a circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. Drains of the first and third transistors couple together at a first node, and drains of the second and fourth transistors couple together at a second node. A first slew boost circuit includes a fifth transistor and a first current mirror. A gate of the fifth transistor couples to the second node. A source of the fifth transistor couples to the first node. The first current mirror couples to the fifth transistor and to the second node. A second slew boost circuit includes a sixth transistor and a second current mirror. A gate of the sixth transistor couples to the first node. A source of the sixth transistor couples to the second node. The second current mirror couples to the sixth transistor and to the first node.
AMPLIFIER CIRCUIT
An amplifier circuit has: a first amplifier circuit, including a chopper circuit amplifying a first differential signal input between first and second input terminals to output a second differential signal; and a second amplifier circuit amplifying the second differential signal to output a single-ended signal. The second amplifier circuit includes: a first circuit including first and second transistors, the first circuit being connected to the first amplifier circuit so that the second differential signal input into gates of these transistors, the first circuit converting the second differential signal to a current flowing into a first node connected to the first transistor and a current flowing into a second node connected to the second transistor; and a second circuit negatively feeding back a voltage at the second node so that the difference in voltage between these nodes is reduced. The second amplifier circuit outputs the single-ended signal from the second node.
Low noise amplifier with noise cancellation
An exemplary embodiment of a low noise amplifier has integral noise cancellation to provide a low noise figure and operation over a frequency range of 40 GHz-60 GHz. An amplifier amplifies an input signal as well as noise present with the amplified signal and amplified noise being out of phase and in phase, respectively, with the corresponding inputs. An auxiliary amplifier amplifies the same inputs and generates an amplified signal and amplified noise both being out of phase relative to the inputs. A summation circuit combines all of these amplified signals with the noise being cancelled since the auxiliary amplifier provides the same amount of amplification as the amplifier and the amplified noise signals being summed are 180 degrees out of phase to each other. Preferably, the amplifier, auxiliary amplifier and the summation device utilize CMOS transistors disposed on an SOI substrate with impedance stabilization over the frequency range.
CONFIGURABLE MODAL AMPLIFIER SYSTEM
Configurable amplifier systems are described in which the power supply rail of a linear amplifier, e.g., a class A amplifier, is modulated by a switching amplifier, e.g., a class D amplifier, that may also be configured to operate independently of the linear amplifier. Techniques are also described by which the standing current of the output stage of a linear amplifier is modulated based on the input signal to the linear amplifier or based on modulation of the power supply rail of the linear amplifier.
MULTI-STAGE AND FEED FORWARD COMPENSATED COMPLEMENTARY CURRENT FIELD EFFECT TRANSISTOR AMPLIFIERS
The present invention relates to a multi-stage and feed forward compensated complimentary current field effect transistor amplifiers, enabling a charge-based approach that takes advantage of the exponential properties incurred in sub-threshold operation. A plurality of complimentary pairs of novel current field effect transistors are connected in series to form a multi-stage amplifier.
High Output Current Transconductance Amplifier
A transconductance amplifier (TCA) implemented with high electron mobility transistors (HEMTs) in a push-pull amplifier output stage provides a voltage controlled constant high output current to loads ranging from 10 m to 1 with a bandwidth of 25 MHz. A driving stage for the HEMTs is implemented with variable gain amplifiers that amplify the input voltage signal and provide bias for the HEMTs. An automatic gain control may be connected between the TCA output and the variable gain amplifiers to ensure a constant current output for a varying load.
High voltage compatible push-pull buffer circuit
A voltage regulator having a buffer circuit and method for operating the same is disclosed. A voltage regulator having a buffer circuit includes an input stage coupled to receive an input voltage and an output stage configured to provide an output signal on an output node. The output stage includes first and second output transistors coupled to the output node. The circuit further includes a buffer stage coupled between the input and output stages. The buffer stage includes a first buffer transistor having a gate terminal coupled to the input stage and a source terminal coupled to a gate terminal of the first output transistor. The circuit further includes a first current mirror coupled to the first buffer transistor, and a second current mirror coupled to the first current mirror, the second current mirror including the second output transistor.
Switched-capacitor power amplifiers
A switched-capacitor power amplifier comprising a plurality of cells and methods for its operation are described. Switched signal lines switch supply to respective capacitors. Switches connect respective signal lines to a first supply and switches connect respective signal lines to a second supply. Pairs of switches on each signal line are switched so that one is switched off whilst the other is switched on. In a full amplitude mode, operation of the switches provides an output having a peak determined by the first supply. A switch signal line is provided between nodes in respective signal lines, a switch being provided in the switch signal line. In a half amplitude mode, switch is switched at the radio frequency in the other direction to that of switches connecting the signal lines to respective ones of the first and second supplies with the other switches being kept open.
Amplification device
An amplification device comprising: a push pull circuit which amplifies an input signal; a diamond buffer circuit to which the signal which is amplified by the push pull circuit is input; and a current mirror circuit which is connected to a power supply and the diamond buffer circuit and is connected to a retraction current terminal of the push pull circuit.
Device stack with novel gate capacitor topology
Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.